ST STM32F10 Series Application Note
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- Application note (28 pages) ,
- Reference manual (519 pages) ,
- Application note (23 pages)
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Getting started with STM32F10xxx hardware development
Introduction
This document is addressed to system designers who need a hardware implementation
overview of the development board features, such as power supply, clock management,
reset control, boot mode settings, and debug management.
It shows how to use the low-density value line, low-density, medium-density value line,
medium-density, high-density, XL-density and connectivity line STM32F10xxx products (the
full list is detailed in
develop an application. Detailed reference design schematics are also provided, with the
description of the main components, interfaces, and modes.
Type
Microcontrollers
December 2022
Table
1), and describes the minimum hardware resources required to
Table 1. Applicable products
AN2586 Rev 8
Application note
Lines
STM32F100 Value Line
STM32F101
STM32F102
STM32F103
STM32F105/107
AN2586
1/29
www.st.com
1
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Table of Contents
Related Manuals for ST STM32F10 Series
Summary of Contents for ST STM32F10 Series
- Page 1 Detailed reference design schematics are also provided, with the description of the main components, interfaces, and modes. Table 1. Applicable products Type Lines STM32F100 Value Line STM32F101 Microcontrollers STM32F102 STM32F103 STM32F105/107 December 2022 AN2586 Rev 8 1/29 www.st.com...
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Page 2: Table Of Contents
Contents Contents General information ......... 6 Power supplies . - Page 3 Contents 5.3.3 Internal pull-up and pull-down resistors on JTAG pins ....20 5.3.4 SWJ debug port connection with standard JTAG connector ..20 Recommendations .
- Page 4 List of tables List of tables Table 1. Applicable products ............1 Table 2.
- Page 5 List of figures List of figures Figure 1. Power supply overview ........... . . 7 Figure 2.
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Page 6: General Information
General information General information ® ® This document applies to STM32F10xxx microcontrollers, based on Arm Cortex cores. Note: Arm is a registered trademark of Arm Limited (or its subsidiaries) in the US and/or elsewhere. Glossary Low-density value line devices are STM32F100xx microcontrollers where the flash memory density ranges between 16 and 32 Kbytes. -
Page 7: Power Supplies
Power supplies Power supplies Introduction The device requires a 2.0 to 3.6 V operating voltage supply (V ). An embedded regulator is used to supply the internal 1.8 V digital power. The real-time clock (RTC) and backup registers can be powered from the V voltage when the main V supply is powered off. -
Page 8: Battery Backup
Power supplies On packages with 64 pins or less The V and V pins are not available, they are internally connected to the ADC REF+ REF- voltage supply (V ) and ground (V 2.1.2 Battery backup To retain the content of the Backup registers when V is turned off, the V pin can be connected to an optional standby voltage supplied by a battery or another source. -
Page 9: Reset And Power Supply Supervisor
Power supplies Figure 2. Power supply scheme STM32F10xxx REF+ Battery 100 nF + 1 µF (note 1) 100 nF + 1 µF N × 100 nF DD 1/2/3/.../N + 1 × 10 µF REF– SS 1/2/3/.../N ai14865b 1. Optional. If a separate, external reference voltage is connected on V , the two capacitors (100 nF and REF+ 1 µF) must be connected. -
Page 10: Programmable Voltage Detector (Pvd)
Power supplies 2.3.2 Programmable voltage detector (PVD) You can use the PVD to monitor the V power supply by comparing it to a threshold selected by the PLS[2:0] bits in the Power control register (PWR_CR). The PVD is enabled by setting the PVDE bit. A PVDO flag is available, in the Power control/status register (PWR_CSR), to indicate whether V is higher or lower than the PVD threshold. -
Page 11: Figure 5. Simplified Diagram Of The Reset Circuit
Power supplies The STM32F1xx does not require an external reset circuit to power-up correctly. Only a pull- down capacitor is recommended to improve EMS performance by protecting the device against parasitic resets. See Figure Charging and discharging a pull-down capacitor through an internal resistor increases the device power consumption. -
Page 12: Clocks
Clocks Clocks Three different clock sources can be used to drive the system clock (SYSCLK): • HSI oscillator clock (high-speed internal clock signal) • HSE oscillator clock (high-speed external clock signal) • PLL clock The devices have two secondary clock sources: •... -
Page 13: External Source (Hse Bypass)
Clocks 3.1.1 External source (HSE bypass) In this mode, an external clock source must be provided. It can have a frequency of up to: • 24 MHz for STM32F100xx value line devices • 25 MHz for STM32F101xx, STM32F102xx and STM32F103xx devices •... -
Page 14: Lse Osc Clock
A 0 Ω resistor works, but it is not optimal. Typical value is in the range of 5 to 6 R (resonator series resistance). To fine tune value refer to AN2867 - Oscillator design guide for ST microcontrollers. 3.2.1 External source (LSE bypass) In this mode, an external clock source must be provided. -
Page 15: Clock Security System (Css)
HSE oscillator. If the HSE oscillator clock (divided or not) is the clock entry of the PLL used as system clock when the failure occurs, the PLL is disabled too. For details, see the STM32F10xxx (RM0008) and STM32F100xx (RM0041) reference manuals available from the STMicroelectronics website www.st.com. AN2586 Rev 8 15/29... -
Page 16: Boot Configuration
Boot configuration Boot configuration Boot mode selection In the STM32F10xxx, three different boot modes can be selected by means of the BOOT[1:0] pins, as shown in Table Table 2. Boot modes BOOT mode selection pins Boot mode Aliasing BOOT1 BOOT0 Main flash memory Main flash memory is selected as boot space System memory... -
Page 17: Embedded Boot Loader Mode
USB OTG FS, however, can only function if an external 8 MHz, 14.7456 MHz or 25 MHz clock (HSE) is present. For further details, refer to AN2662. This embedded boot loader is located in the System memory and is programmed by ST during production. -
Page 18: Debug Management
(STM3210B-EVAL, STM3210C-EVAL, STM32100B-EVAL or STM3210E-EVAL). The Value line evaluation board (STM32100B-EVAL or STM32100E-EVAL) embeds the debug tools (ST-LINK). Consequently, it can be directly connected to the PC through a USB cable. Figure 11. Host-to-board connection... -
Page 19: Flexible Swj-Dp Pin Assignment
JTAG-DP disabled and SW-DP enabled JTAG-DP disabled and SW-DP disabled Released Table 4 shows the different possibilities to release some pins. For more details, see the STM32F10xxx (RM0008) and STM32F100xx (RM0041) reference manuals, available from the STMicroelectronics website www.st.com. AN2586 Rev 8 19/29... -
Page 20: Internal Pull-Up And Pull-Down Resistors On Jtag Pins
Debug management 5.3.3 Internal pull-up and pull-down resistors on JTAG pins The JTAG input pins must not be floating since they are directly connected to flip-flops to control the debug mode features. Special care must be taken with the SWCLK/TCK pin that is directly connected to the clock of some of these flip-flops. -
Page 21: Recommendations
Recommendations Recommendations Printed circuit board For technical reasons, it is best to use a multilayer printed circuit board (PCB) with a separate layer dedicated to ground (V ) and another dedicated to the V supply. This provides good decoupling and a good shielding effect. For many applications, economical reasons prohibit the use of this type of board. -
Page 22: Other Signals
Recommendations Figure 13. Typical layout for V pair Via to V Via to V Cap. STM32F10xxx Other signals When designing an application, the EMC performance can be improved by closely studying: • Signals for which a temporary disturbance affects the running process permanently (the case of interrupts and handshaking strobe signals, and not the case for LED commands). -
Page 23: Reference Design
Reference design Reference design Description The reference design shown in Figure 14, is based on the STM32F103ZE(T6), a highly ™ integrated microcontroller running at 72 MHz, that combines the new Cortex -M3 32-bit RISC CPU core with 512 Kbytes of embedded flash memory and up to 64 Kbytes of high- speed SRAM This reference design can be tailored to any other STM32F10xxx device with different package, using the pins correspondence given in... -
Page 24: Component References
Reference design Component references Table 5. Mandatory components Name Reference Quantity Comments 1 Microcontroller STM32F103ZE(T6) 144-pin package 2 Capacitors 100 nF Ceramic capacitors (decoupling capacitors) 3 Capacitor 10 µF Ceramic capacitor (decoupling capacitor) Table 6. Optional components Name Reference Quantity Comments 1 Resistor 10 kΩ... -
Page 25: Figure 14. Stm32F103Ze(T6) Microcontroller Reference Schematic
Figure 14. STM32F103ZE(T6) microcontroller reference schematic PA0-WKUP PG15 PG14 PG13 VSS_1 VDD_11 PG12 VSS_2 VDD_10 PG11 VSS_3 VDD_9 100nF 1µF PG10 VSS_4 VDD_8 VSS_5 VDD_7 VSS_6 VDD_6 VSS_7 VDD_5 VSS_8 VDD_4 JTAG PA10 VSS_9 VDD_3 PA11 VSS_10 VDD_2 PA12 VSS_11 VDD_1 100nF 1µF... -
Page 26: Table 7. Reference Connection For All Packages
Reference design Table 7. Reference connection for all packages Pin number for Pin number for Pin number for LQFP packages BGA packages VFQFPN package Pin name 144 pins 100 pins 64 pins 48 pins 144 pins 100 pins 36 pins OSC_IN OSC_OUT PC15-... - Page 27 Reference design Table 7. Reference connection for all packages (continued) Pin number for Pin number for Pin number for LQFP packages BGA packages VFQFPN package Pin name 144 pins 100 pins 64 pins 48 pins 144 pins 100 pins 36 pins DD_9 DD_10 DD_11...
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Page 28: Revision History
Revision history Revision history Table 8. Document revision history Date Revision Changes 12-Jul-2007 Initial release. Application note also applicable to High-density devices. Figure 1: Power supply overview, Figure 2: Power supply scheme Figure 6: Clock overview updated. 23-May-2008 Low-speed internal RC frequency modified in Section 3: Clocks on page 12. - Page 29 ST products and/or to this document at any time without notice. Purchasers should obtain the latest relevant information on ST products before placing orders. ST products are sold pursuant to ST’s terms and conditions of sale in place at the time of order acknowledgment.
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