Host Initialization; Device Initialization - ST STM32F101 series Reference Manual

USB on-the-go full-speed (OTG_FS)
28.17.2

Host initialization

To initialize the core as host, the application must perform the following steps:
1. Program the HPRTINT in the OTG_FS_GINTMSK register to unmask
2. Program the OTG_FS_HCFG register to select full-speed host
3. Program the PPWR bit in OTG_FS_HPRT to 1. This drives V
4. Wait for the PCDET interrupt in OTG_FS_HPRT0. This indicates that a device is
connecting to the port.
5. Program the PRST bit in OTG_FS_HPRT to 1. This starts the reset process.
6. Wait at least 10 ms for the reset process to complete.
7. Program the PRST bit in OTG_FS_HPRT to 0.
8. Wait for the PENCHNG interrupt in OTG_FS_HPRT.
9. Read the PSPD bit in OTG_FS_HPRT to get the enumerated speed.
10. Program the HFIR register with a value corresponding to the selected PHY clock 1
11. Program the FSLSPCS field in the OTG_FS_HCFG register following the speed of the
device detected in step 9. If FSLSPCS has been changed a port reset must be
performed.
12. Program the OTG_FS_GRXFSIZ register to select the size of the receive FIFO.
13. Program the OTG_FS_HNPTXFSIZ register to select the size and the start address of
the Non-periodic transmit FIFO for non-periodic transactions.
14. Program the OTG_FS_HPTXFSIZ register to select the size and start address of the
periodic transmit FIFO for periodic transactions.
To communicate with devices, the system software must initialize and enable at least one
channel.
28.17.3

Device initialization

The application must perform the following steps to initialize the core as a device on power-
up or after a mode change from host to device.
1. Program the following fields in the OTG_FS_DCFG register:
–
–
2. Program the OTG_FS_GINTMSK register to unmask the following interrupts:
–
–
–
–
–
3. Program the VBUSBSEN bit in the OTG_FS_GCCFG register to enable V
in "B" device mode and supply the 5 volts across the pull-up resistor on the DP line.
4. Wait for the USBRST interrupt in OTG_FS_GINTSTS. It indicates that a reset has been
detected on the USB that lasts for about 10 ms on receiving this interrupt.
Wait for the ENUMDNE interrupt in OTG_FS_GINTSTS. This interrupt indicates the end of
reset on the USB. On receiving this interrupt, the application must read the OTG_FS_DSTS
913/1128
Device speed
Non-zero-length status OUT handshake
USB reset
Enumeration done
Early suspend
USB suspend
SOF
DocID13902 Rev 15
RM0008
on the USB.
BUS
sensing
BUS