Spi Crc Polynomial Register (Spi_Crcpr) (Not Used In I; Mode); Spi Rx Crc Register (Spi_Rxcrcr); Spi Tx Crc Register (Spi_Txcrcr) - ST STM32F101 series Reference Manual

RM0008
25.5.5

SPI CRC polynomial register (SPI_CRCPR) (not used in I

mode)

Address offset: 0x10
Reset value: 0x0007
15 14 13
rw rw rw
Bits 15:0 CRCPOLY[15:0]: CRC polynomial register
Note: These bits are not used for the I
25.5.6 SPI RX CRC register (SPI_RXCRCR) (not used in I
Address offset: 0x14
Reset value: 0x0000
15 14 13
r r r
Bits 15:0 RXCRC[15:0]: Rx CRC register
When CRC calculation is enabled, the RxCRC[15:0] bits contain the computed CRC value of
the subsequently received bytes. This register is reset when the CRCEN bit in SPI_CR1
register is written to 1. The CRC is calculated serially using the polynomial programmed in
the SPI_CRCPR register.
Only the 8 LSB bits are considered when the data frame format is set to be 8-bit data (DFF
bit of SPI_CR1 is cleared). CRC calculation is done based on any CRC8 standard.
The entire 16-bits of this register are considered when a 16-bit data frame format is selected
(DFF bit of the SPI_CR1 register is set). CRC calculation is done based on any CRC16
standard.
Note: A read to this register when the BSY Flag is set could return an incorrect value.
25.5.7 SPI TX CRC register (SPI_TXCRCR) (not used in I
Address offset: 0x18
Reset value: 0x0000
15 14 13
r r r
12 11 10 9
rw rw rw rw
This register contains the polynomial for the CRC calculation.
The CRC polynomial (0007h) is the reset value of this register. Another polynomial can be
configured as required.
12 11 10 9
r r r r
Theser bits are not used for I
12 11 10 9
r r r r
8 7 6
CRCPOLY[15:0]
rw rw rw
2
S mode.
8 7 6
RXCRC[15:0]
r r r
2
S mode.
8 7 6
TXCRC[15:0]
r r r
DocID13902 Rev 15
Serial peripheral interface (SPI)
2
S
5 4 3 2
rw rw rw rw
2
S mode)
5 4 3 2
r r r r
2
S mode)
5 4 3 2
r r r r
1 0
rw rw
1 0
r r
1 0
r r
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