ST STM32F101 series Reference Manual page 143

Connectivity line devices: reset and clock control (RCC)
Bit 26 CAN2RST: CAN2 reset
Bit 25 CAN1RST: CAN1 reset
Bits 24:23
Bit 22 I2C2RST: I2C 2 reset
Bit 21 I2C1RST: I2C1 reset
Bit 20 UART5RST: USART 5 reset
Bit 19 UART4RST: USART 4 reset
Bit 18 USART3RST: USART 3 reset
Bit 17 USART2RST: USART 2 reset
Bits 16
Bit 15 SPI3RST: SPI3 reset
Bit 14 SPI2RST: SPI2 reset
Bits 13:12
143/1128
Set and cleared by software.
0: No effect
1: Reset CAN2
Set and cleared by software.
0: No effect
1: Reset CAN1
Reserved, must be kept at reset value.
Set and cleared by software.
0: No effect
1: Reset I2C 2
Set and cleared by software.
0: No effect
1: Reset I2C 1
Set and cleared by software.
0: No effect
1: Reset USART 5
Set and cleared by software.
0: No effect
1: Reset USART 4
Set and cleared by software.
0: No effect
1: Reset USART 3
Set and cleared by software.
0: No effect
1: Reset USART 2
Reserved, must be kept at reset value.
Set and cleared by software.
0: No effect
1: Reset SPI 3
Set and cleared by software.
0: No effect
1: Reset SPI2
Reserved, must be kept at reset value.
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