Table 126. Fsmc_Btrx Bit Fields - ST STM32F101 series Reference Manual

Flexible static memory controller (FSMC)
Bit No.
10
9
8
7
6
5-4
3-2
1
0
Bit No.
31:30
29:28
27-24
23-20
19-16
15-8
7-4
3-0
529/1128
Table 125. FSMC_BCRx bit fields (continued)
Bit name
WRAPMOD 0x0
WAITPOL to be set according to memory
BURSTEN 0x1
Reserved 0x1
FACCEN Set according to memory support (NOR Flash memory)
MWID As needed
MTYP 0x1 or 0x2
MUXEN As needed
MBKEN 0x1

Table 126. FSMC_BTRx bit fields

Bit name
Reserved 0x0
ACCMOD 0x0
DATLAT Data latency
0x0 to get CLK = HCLK (not supported)
CLKDIV 0x1 to get CLK = 2 × HCLK
BUSTURN no effect
DATAST Don't care
ADDHLD Don't care
ADDSET Don't care
DocID13902 Rev 15
Value to set
Value to set
RM0008