Table 214. Destination Address Filtering - ST STM32F101 series Reference Manual

Ethernet (ETH): media access control (MAC) with DMA controller
Inverse filtering operation
For both destination and source address filtering, there is an option to invert the filter-match
result at the final output. These are controlled by the DAIF and SAIF bits in the Frame filter
register, respectively. The DAIF bit is applicable for both Unicast and Multicast DA frames.
The result of the unicast/multicast destination address filter is inverted in this mode.
Similarly, when the SAIF bit is set, the result of the unicast SA filter is inverted.
and Table 215
frame received.
Frame
type
Broadcast
Unicast
Multicast
989/1128
summarize destination and source address filtering based on the type of

Table 214. Destination address filtering

PM HPF HU DAIF
1 X X X
0 X X X
0 X X X
1 X X X
0 X 0 0
0 X 0 1
0 0 1 0
0 0 1 1
0 1 1 0
0 1 1 1
1 X X X
X X X X
0 X X 0
0 0 X 0
0 1 X 0
0 X X 1
0 0 X 1
0 1 X 1
DocID13902 Rev 15
HM PAM DB
X X X Pass
X X 0 Pass
X X 1 Fail
X X X Pass all frames
X X X Pass on perfect/group filter match
X X X Fail on perfect/Group filter match
X X X Pass on hash filter match
X X X Fail on hash filter match
Pass on hash or perfect/Group filter
X X X
match
X X X Fail on hash or perfect/Group filter match
X X X Pass all frames
X 1 X Pass all frames
Pass on Perfect/Group filter match and
0 0 X
drop PAUSE control frames if PCF = 0x
Pass on hash filter match and drop
1 0 X
PAUSE control frames if PCF = 0x
Pass on hash or perfect/Group filter
1 0 X match and drop PAUSE control frames if
PCF = 0x
Fail on perfect/Group filter match and
0 0 X
drop PAUSE control frames if PCF = 0x
Fail on hash filter match and drop PAUSE
1 0 X
control frames if PCF = 0x
Fail on hash or perfect/Group filter match
1 0 X and drop PAUSE control frames if PCF =
0x
RM0008
Table 214
DA filter operation