ST STM32F101 series Reference Manual page 110

RM0008
Bit 20 UART5RST: USART5 reset
Bit 19 UART4RST: USART4 reset
Bit 18 USART3RST: USART3 reset
Bit 17 USART2RST: USART2 reset
Bit 16 Reserved, must be kept at reset value.
Bit 15 SPI3RST: SPI3 reset
Bit 14 SPI2RST: SPI2 reset
Bits 13:12 Reserved, must be kept at reset value.
Bit 11 WWDGRST: Window watchdog reset
Bits 10:9 Reserved, must be kept at reset value.
Bit 8 TIM14RST: TIM14 timer reset
Bit 7 TIM13RST: TIM13 timer reset
Bit 6 TIM12RST: TIM12 timer reset
Low-, medium-, high- and XL-density reset and clock control (RCC)
Set and cleared by software.
0: No effect
1: Reset USART5
Set and cleared by software.
0: No effect
1: Reset USART4
Set and cleared by software.
0: No effect
1: Reset USART3
Set and cleared by software.
0: No effect
1: Reset USART2
Set and cleared by software.
0: No effect
1: Reset SPI3
Set and cleared by software.
0: No effect
1: Reset SPI2
Set and cleared by software.
0: No effect
1: Reset window watchdog
Set and cleared by software.
0: No effect
1: Reset TIM14
Set and cleared by software.
0: No effect
1: Reset TIM13
Set and cleared by software.
0: No effect
1: Reset TIM12
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