ST STM32F101 series Reference Manual page 870

RM0008
Bit 18 VBUSASEN: Enable the V
Bit 17 Reserved, must be kept at reset value.
Bit 16 PWRDWN: Power down
Used to activate the transceiver in transmission/reception
Bits 15:0 Reserved, must be kept at reset value.
OTG_FS core ID register (OTG_FS_CID)
Address offset: 0x03C
Reset value:0x0000 1100
This is a read only register containing the Product ID.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10
rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw
Bits 31:0 PRODUCT_ID: Product ID field
Application-programmable ID field.
OTG_FS Host periodic transmit FIFO size register (OTG_FS_HPTXFSIZ)
Address offset: 0x100
Reset value: 0x0200 0600
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10
r/r r/r r/r r/r r/r r/r r/r
w w w w w w w
Bits 31:16 PTXFD: Host periodic TxFIFO depth
This value is in terms of 32-bit words.
Minimum value is 16
Bits 15:0 PTXSA: Host periodic TxFIFO start address
The power-on reset value of this register is the sum of the largest Rx data FIFO depth and
largest non-periodic Tx data FIFO depth.
0: V sensing "A" disabled
BUS
1: V sensing "A" enabled
BUS
0: Power down active
1: Power down deactivated ("Transceiver active")
PTXFSIZ
r/r r/r r/r r/r r/r r/r
w w w w w w
sensing "A" device
BUS
PRODUCT_ID
r/r r/r r/r r/r r/r r/r r/r
w w w w w w w
DocID13902 Rev 15
USB on-the-go full-speed (OTG_FS)
9 8 7 6 5
9 8 7 6 5
PTXSA
r/r r/r r/r r/r r/r r/r r/r
w w w w w w w
4 3 2 1 0
4 3 2 1 0
r/r r/r r/r r/r r/r
w w w w w
870/1128
957