Table 63. Vector Table For Other Stm32F10Xxx Devices - ST STM32F101 series Reference Manual

Interrupts and events
-
-3
-2
-1
0
1
2
-
3
4
-
5
6
0 7
1 8
2 9
3 10
4 11
5 12
6 13
7 14
8 15
9 16
10 17
11 18
12 19
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Table 63. Vector table for other STM32F10xxx devices

Type of
Acronym
priority
- -
fixed Reset
fixed NMI
fixed HardFault
settable MemManage
settable BusFault
settable UsageFault
- -
settable SVCall
settable Debug Monitor
- -
settable PendSV
settable SysTick
settable WWDG
settable PVD
settable TAMPER
settable RTC
settable FLASH
settable RCC
settable EXTI0
settable EXTI1
settable EXTI2
settable EXTI3
settable EXTI4
settable DMA1_Channel1
settable DMA1_Channel2
DocID13902 Rev 15
Description
Reserved
Reset
Non maskable interrupt. The RCC
Clock Security System (CSS) is
linked to the NMI vector.
All class of fault
Memory management
Prefetch fault, memory access fault
Undefined instruction or illegal state
Reserved
System service call via SWI
instruction
Debug Monitor
Reserved
Pendable request for system
service
System tick timer
Window watchdog interrupt
PVD through EXTI Line detection
interrupt
Tamper interrupt
RTC global interrupt
Flash global interrupt
RCC global interrupt
EXTI Line0 interrupt
EXTI Line1 interrupt
EXTI Line2 interrupt
EXTI Line3 interrupt
EXTI Line4 interrupt
DMA1 Channel1 global interrupt
DMA1 Channel2 global interrupt
RM0008
Address
0x0000_0000
0x0000_0004
0x0000_0008
0x0000_000C
0x0000_0010
0x0000_0014
0x0000_0018
0x0000_001C -
0x0000_002B
0x0000_002C
0x0000_0030
0x0000_0034
0x0000_0038
0x0000_003C
0x0000_0040
0x0000_0044
0x0000_0048
0x0000_004C
0x0000_0050
0x0000_0054
0x0000_0058
0x0000_005C
0x0000_0060
0x0000_0064
0x0000_0068
0x0000_006C
0x0000_0070