Figure 277. I2C Interrupt Mapping Diagram - ST STM32F101 series Reference Manual

Advanced arm-based 32-bit mcus

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Table of Contents

Arbitration loss (Master)

Acknowledge failure

Overrun/Underrun

Timeout/Tlow error

SB, ADDR, ADD10, STOPF, BTF, RxNE and TxE are logically ORed on the same interrupt

BERR, ARLO, AF, OVR, PECERR, TIMEOUT and SMBALERT are logically ORed on the

same interrupt channel.

Table 189. I

Interrupt event

Figure 277. I

C Interrupt requests (continued)

C interrupt mapping diagram

DocID13902 Rev 15

Inter-integrated circuit (I

Enable control bit

C) interface

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