Low-Power Modes; Table 27. Low-Power Run - ST STM32G0 1 Series Reference Manual

Power control (PWR)
Exiting Low-power run mode
To exit Low-power run mode, proceed as follows:
1. Force the regulator in main mode by clearing the LPR bit in the
(PWR_CR1).
2. Wait until REGLPF bit is cleared in the
3. Increase the system clock frequency.
Refer to
Low-power run mode
Mode entry
Mode exit
Wakeup latency
4.3.3

Low-power modes

Entering low-power modes
The MCU enters low-power modes by executing the WFI (wait for interrupt), or WFE (wait
for event) instructions, or when the SLEEPONEXIT bit in the Cortex
register is set on return from ISR.
Entering low-power mode through WFI or WFE is executed only if no interrupt is pending or
no event is pending.
Exiting low-power modes
The MCU exits Sleep and Stop low-power modes in a way depending on how the low-power
mode was entered:
•
If the WFI instruction or Return from ISR was used to enter low-power mode, any
peripheral interrupt acknowledged by the NVIC can wake up the device.
•
If the WFE instruction is used to enter low-power mode, the MCU exits low-power
mode as soon as an event occurs. The wakeup event can be generated either by:
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Table 27: Low-power run
Decrease the system clock frequency below 2 MHz
LPR = 1
LPR = 0
Wait until REGLPF = 0
Increase the system clock frequency
Regulator wakeup time from low-power mode
NVIC IRQ interrupt.
When SEVONPEND = 0 in the Cortex
an interrupt in the peripheral control register and in the NVIC. When the MCU
resumes from WFE, the peripheral interrupt pending bit and the NVIC peripheral
IRQ channel pending bit (in the NVIC interrupt clear pending register) have to be
cleared.
Power status register 2
on how to exit Low-power run mode.

Table 27. Low-power run

Description
®
-M0+ system control register: by enabling
RM0444 Rev 5
RM0444
Power control register 1
(PWR_SR2).
®
-M0+ system control