Lptim Interrupts; Lptim Registers; Table 142. Interrupt Events - ST STM32G0 1 Series Reference Manual

RM0444
26.6

LPTIM interrupts

The following events generate an interrupt/wake-up event, if they are enabled through the
LPTIM_IER register:
•
Compare match
•
Auto-reload match (whatever the direction if encoder mode)
•
External trigger event
•
Autoreload register write completed
•
Compare register write completed
•
Direction change (encoder mode), programmable (up / down / both).
Note: If any bit in the LPTIM_IER register (Interrupt Enable Register) is set after that its
corresponding flag in the LPTIM_ISR register (Status Register) is set, the interrupt is not
asserted.
Interrupt event
Compare match
Auto-reload match
External trigger event
Auto-reload register
update OK
Compare register
update OK
Direction change
26.7

LPTIM registers

The peripheral registers can only be accessed by words (32-bit).

Table 142. Interrupt events

Interrupt flag is raised when the content of the Counter register
(LPTIM_CNT) matches the content of the compare register (LPTIM_CMP).
Interrupt flag is raised when the content of the Counter register
(LPTIM_CNT) matches the content of the Auto-reload register
(LPTIM_ARR).
Interrupt flag is raised when an external trigger event is detected
Interrupt flag is raised when the write operation to the LPTIM_ARR register
is complete.
Interrupt flag is raised when the write operation to the LPTIM_CMP register
is complete.
Used in Encoder mode. Two interrupt flags are embedded to signal
direction change:
– UP flag signals up-counting direction change
– DOWN flag signals down-counting direction change.
RM0444 Rev 5
Low-power timer (LPTIM)
Description
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