Syscfg Interrupt Line 20 Status Register (Syscfg_Itline20); Syscfg Interrupt Line 21 Status Register (Syscfg_Itline21); Syscfg Interrupt Line 22 Status Register (Syscfg_Itline22) - ST STM32G0 1 Series Reference Manual

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System configuration controller (SYSCFG)

Bits 31:1 Reserved, must be kept at reset value.

Bit 0 TIM14: Timer 14 interrupt request pending

SYSCFG interrupt line 20 status register (SYSCFG_ITLINE20)

Address offset: 0xD0

System reset value: 0x0000 0000

1. Only significant on devices integrating TIM15, otherwise reserved. Refer to

Bits 31:1 Reserved, must be kept at reset value.

Bit 0 TIM15: Timer 15 interrupt request pending

Address offset: 0xD4

System reset value: 0x0000 0000

1. Only significant on devices integrating the corresponding peripheral, otherwise reserved. Refer to

peripherals.

Bits 31:1 Reserved, must be kept at reset value.

Bit 2 FDCAN2_IT0: FDCAN2 interrupt request pending

Bit 1 FDCAN1_IT0: FDCAN1 interrupt request pending

Bit 0 TIM16: Timer 16 interrupt request pending

Address offset: 0xD8

System reset value: 0x0000 0000

Section 1.4: Availability of

RM0444 Rev 5

peripherals.

Section 1.4: Availability

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