ST STM32G0 1 Series Reference Manual page 84

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Embedded Flash memory (FLASH)

PCROP1A end address option bytes

Flash memory address: 0x1FFF 7810

Reset value: 0x0000 0000 (ST production value)

Bit 31 PCROP_RDP: PCROP area erase upon RDP level regression

Bits 30:9 Reserved, must be kept at reset value.

Bits 8:0 PCROP1A_END[8:0]: PCROP1A area end offset (Bank 1)

Note: Values corresponding to addresses outside the Main memory are not allowed.

WRP1A address option bytes

Flash memory address: 0x1FFF 7818

Reset value: 0x0000 00FF (ST production value)

Bits 31:23 Reserved, must be kept at reset value.

Bits 22:16 WRP1A_END[6:0]: WRP area A end offset (Bank 1)

Note: Values corresponding to addresses outside the Main memory are not allowed.

Bits 15:7 Reserved, must be kept at reset value.

Bits 6:0 WRP1A_STRT[6:0]: WRP area A start offset (Bank 1)

Note: Values corresponding to addresses outside the Main memory are not allowed.

This bit determines whether the PCROP area (and the totality of the PCROP area boundary

pages) is erased by the mass erase triggered by the RDP level regression from Level 1 to

0: Not erased

The software can only set this bit. It is automatically reset upon mass erase following the

RDP regression from Level 1 to Level 0.

PCROP1A_END contains the address of the last subpage of the PCROP1A area (in Bank 1

for dual-bank devices).

WRP1A_END contains the offset of the last page of the WRP area A (in Bank 1 for dual-

bank devices).

WRP1A_STRT contains the offset of the first page of the WRP area A (in Bank 1 for dual-

bank devices).

RM0444 Rev 5

PCROP1A_END[8:0]

WRP1A_END[6:0]

WRP1A_STRT[6:0]

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