General-purpose timers (TIM2/TIM3/TIM4)
Bits 9:8 CC4S[1:0]: Capture/Compare 4 selection
Note: CC4S bits are writable only when the channel is OFF (CC4E = 0 in TIMx_CCER).
Bit 7 OC3CE: Output compare 3 clear enable
Bits 16, 6:4 OC3M[3:0]: Output compare 3 mode
Bit 3 OC3PE: Output compare 3 preload enable
Bit 2 OC3FE: Output compare 3 fast enable
Bits 1:0 CC3S[1:0]: Capture/Compare 3 selection
Note: CC3S bits are writable only when the channel is OFF (CC3E = 0 in TIMx_CCER).
22.4.11
TIMx capture/compare enable register
(TIMx_CCER)(x = 2 to 4)
Address offset: 0x20
Reset value: 0x0000
15
14
13
CC4NP
Res.
CC4P
CC4E
rw
rw
Bit 15 CC4NP: Capture/Compare 4 output Polarity.
Bit 14 Reserved, must be kept at reset value.
Bit 13 CC4P: Capture/Compare 4 output Polarity.
Bit 12 CC4E: Capture/Compare 4 output enable.
Bit 11 CC3NP: Capture/Compare 3 output Polarity.
Bit 10 Reserved, must be kept at reset value.
Bit 9 CC3P: Capture/Compare 3 output Polarity.
Bit 8 CC3E: Capture/Compare 3 output enable.
686/1390
This bit-field defines the direction of the channel (input/output) as well as the used input.
00: CC4 channel is configured as output
01: CC4 channel is configured as input, IC4 is mapped on TI4
10: CC4 channel is configured as input, IC4 is mapped on TI3
11: CC4 channel is configured as input, IC4 is mapped on TRC. This mode is working only if
an internal trigger input is selected through TS bit (TIMx_SMCR register)
Refer to OC1M description (bits 6:4 in TIMx_CCMR1 register)
This bit-field defines the direction of the channel (input/output) as well as the used input.
00: CC3 channel is configured as output
01: CC3 channel is configured as input, IC3 is mapped on TI3
10: CC3 channel is configured as input, IC3 is mapped on TI4
11: CC3 channel is configured as input, IC3 is mapped on TRC. This mode is working only if
an internal trigger input is selected through TS bit (TIMx_SMCR register)
12
11
10
9
CC3NP
Res.
CC3P
rw
rw
rw
Refer to CC1NP description
Refer to CC1P description
refer to CC1E description
Refer to CC1NP description
Refer to CC1P description
Refer to CC1E description
8
7
6
CC3E
CC2NP
Res.
CC2P
rw
rw
RM0444 Rev 5
5
4
3
2
CC2E
CC1NP
Res.
rw
rw
rw
RM0444
1
0
CC1P
CC1E
rw
rw
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