Direct memory access controller (DMA)
10.3
DMA implementation
10.3.1
DMA
The devices incorporate one or two DMA controller instances. The following implementation
table shows the number of DMA channels for either instance. A dash indicates that the
instance is not implemented.
Number of channels
10.3.2
DMA request mapping
The DMA controller is connected to DMA requests from the AHB/APB peripherals through
the DMAMUX peripheral.
For the mapping of the different requests, refer to the
implementation.
10.4
DMA functional description
10.4.1
DMA block diagram
278/1390
Table 46. DMA implementation
DMA1
DMA2
RM0444 Rev 5
STM32G031xx
STM32G041xx
5
-
Section 11.3: DMAMUX
STM32G051xx
STM32G061xx
STM32G0B1xx
STM32G071xx
STM32G0C1xx
STM32G081xx
7
-
RM0444
7
5
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