Extended Interrupt And Event Controller (Exti); Exti Main Features; Exti Block Diagram - ST STM32G0 1 Series Reference Manual

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Extended interrupt and event controller (EXTI)

The Extended interrupt and event controller (EXTI) manages the CPU and system wakeup
through configurable and direct event inputs (lines). It provides wakeup requests to the
power control, and generates an interrupt request to the CPU NVIC and events to the CPU
event input. For the CPU an additional event generation block (EVG) is needed to generate
the CPU event signal.
The EXTI wakeup requests allow the system to be woken up from Stop modes.
The interrupt request and event request generation can also be used in Run modes.
The EXTI also includes the EXTI I/O port mux.
13.1

EXTI main features

The EXTI main features are the following:
•
System wakeup upon event on any input
•
Wakeup flag and CPU interrupt generation for events not having a wakeup flag in their
source peripheral
•
Configurable events (from I/Os, peripherals not having an associated interrupt pending
status bit, or peripherals generating a pulse)
–
–
–
–
•
Direct events (from peripherals having an associated flag and interrupt pending status
bit)
–
–
–
–
•
I/O port selector
13.2

EXTI block diagram

The EXTI consists of a register block accessed via an AHB interface, the event input trigger
block, the masking block, and EXTI mux as shown in
The register block contains all the EXTI registers.
The event input trigger block provides an event input edge trigger logic.
The masking block provides the event input distribution to the different wakeup, interrupt
and event outputs, and the masking of these.
The EXTI mux provides the I/O port selection on to the EXTI event signal.
Selectable active trigger edge
Independent rising and falling edge interrupt pending status bits
Individual interrupt and event generation mask, used for conditioning the CPU
wakeup, interrupt and event generation
SW trigger possibility
Fixed rising edge active trigger
No interrupt pending status bit in the EXTI
Individual interrupt and event generation mask for conditioning the CPU wakeup
and event generation
No SW trigger possibility
Extended interrupt and event controller (EXTI)
Figure 26.
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