Figure 225. Counter Timing Diagram, Internal Clock Divided By 2; Figure 226. Counter Timing Diagram, Internal Clock Divided By 4 - ST STM32G0 1 Series Reference Manual

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General-purpose timers (TIM14)
Timerclock = CK_CNT
Counter register
Counter overflow
Update event (UEV)
Update interrupt flag
Timerclock = CK_CNT
Counter overflow
Update event (UEV)
Update interrupt flag
720/1390

Figure 225. Counter timing diagram, internal clock divided by 2

CK_PSC
CNT_EN
0034
(UIF)

Figure 226. Counter timing diagram, internal clock divided by 4

CK_PSC
CNT_EN
Counter register
(UIF)
0036
0035
0035
0036
RM0444 Rev 5
0000
0001
0002
0000
RM0444
0003
MS31079V2
0001
MS31080V2

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