Timx Capture/Compare Enable Register (Timx_Ccer)(X = 16 To 17) - ST STM32G0 1 Series Reference Manual

RM0444
Bit 2 OC1FE: Output Compare 1 fast enable
Bits 1:0 CC1S[1:0]: Capture/Compare 1 selection
Note: CC1S bits are writable only when the channel is OFF (CC1E = '0' in TIMx_CCER).
25.6.8

TIMx capture/compare enable register (TIMx_CCER)(x = 16 to 17)

Address offset: 0x20
Reset value: 0x0000
15 14 13
Res. Res. Res. Res.
Bits 15:4 Reserved, must be kept at reset value.
Bit 3 CC1NP: Capture/Compare 1 complementary output polarity
CC1 channel configured as output:
CC1 channel configured as input:
Note: This bit is not writable as soon as LOCK level 2 or 3 has been programmed (LOCK bits
This bit decreases the latency between a trigger event and a transition on the timer output.
It must be used in one-pulse mode (OPM bit set in TIMx_CR1 register), to have the output
pulse starting as soon as possible after the starting trigger.
0: CC1 behaves normally depending on counter and CCR1 values even when the trigger is
ON. The minimum delay to activate CC1 output when an edge occurs on the trigger input
is 5 clock cycles.
1: An active edge on the trigger input acts like a compare match on CC1 output. Then, OC
is set to the compare level independently of the result of the comparison. Delay to
sample the trigger input and to activate CC1 output is reduced to 3 clock cycles. OC1FE
acts only if the channel is configured in PWM1 or PWM2 mode.
This bit-field defines the direction of the channel (input/output) as well as the used input.
00: CC1 channel is configured as output
01: CC1 channel is configured as input, IC1 is mapped on TI1
Others: Reserved
12 11 10 9
Res. Res. Res.
0: OC1N active high
1: OC1N active low
This bit is used in conjunction with CC1P to define the polarity of TI1FP1 and TI2FP1. Refer
to the description of CC1P.
in TIMx_BDTR register) and CC1S="00" (the channel is configured in output).
On channels that have a complementary output, this bit is preloaded. If the CCPC bit is
set in the TIMx_CR2 register then the CC1NP active bit takes the new value from the
preloaded bit only when a commutation event is generated.
General-purpose timers (TIM15/TIM16/TIM17)
8 7 6
Res. Res. Res.
RM0444 Rev 5
5 4 3 2
Res. Res. CC1NP CC1NE
rw rw
1 0
CC1P CC1E
rw rw
815/1390
830