Exti Cpu Wakeup With Interrupt Mask Register (Exti_Imr1); Exti Cpu Wakeup With Event Mask Register (Exti_Emr1) - ST STM32G0 1 Series Reference Manual

Extended interrupt and event controller (EXTI)
13.5.12

EXTI CPU wakeup with interrupt mask register (EXTI_IMR1)

Address offset: 0x080 (EXTI_IMR1)
Reset value: 0xFFF8 0000
Contains register bits for configurable events and direct events.
The reset value is set such as to, by default, enable interrupt from direct lines, and disable
interrupt from configurable lines.
31 30 29
IM31 IM30 IM29 IM28
rw rw rw
15 14 13
IM15 IM14 IM13 IM12
rw rw rw
Bits 31:0 IMx: CPU wakeup with interrupt mask on line x (x = 31 to 0)
13.5.13

EXTI CPU wakeup with event mask register (EXTI_EMR1)

Address offset: 0x084 (EXTI_EMR1)
Reset value: 0x0000 0000
31 30 29
EM31 EM30 EM29 EM28
rw rw rw
15 14 13
EM15 EM14 EM13 EM12
rw rw rw
Bits 31:0 EMx: CPU wakeup with event generation mask on line x (x = 31 to 0)
Setting/clearing each bit unmasks/masks the CPU wakeup with event generation on the
corresponding line.
0: wakeup with event generation masked
1: wakeup with event generation unmasked
The EM24, EM22 and EM20 bits are only available in STM32G0B1xx and STM32G0C1xx.
They are reserved in STM32G031xx and STM32G041xx as well as STM32G051xx and
STM32G061xx as well as STM32G071xx and STM32G081xx.
332/1390
28 27 26 25
IM27 IM26 IM25
rw rw rw rw
12 11 10 9
IM11 IM10 IM9
rw rw rw rw
Setting/clearing each bit unmasks/masks the CPU wakeup with interrupt, by an event on the
corresponding line.
0: wakeup with interrupt masked
1: wakeup with interrupt unasked
The IM24, IM22 and IM20 bits are only available in STM32G0B1xx and STM32G0C1xx.
They are reserved in STM32G031xx and STM32G041xx as well as STM32G051xx and
STM32G061xx as well as STM32G071xx and STM32G081xx.
The IM27, IM18 and IM17 bits are only available in STM32G071xx and STM32G081xx as
well as STM32G0B1xx and STM32G0C1xx. They are reserved in STM32G031xx and
STM32G041xx as well as STM32G051xx and STM32G061xx.
28 27 26 25
EM27 EM26 EM25
rw rw rw rw
12 11 10 9
EM11 EM10 EM9
rw rw rw rw
24 23 22
IM24 IM23 IM22 IM21
rw rw rw
8 7 6
IM8 IM7 IM6
rw rw rw
24 23 22
EM24 EM23 EM22 EM21
rw rw rw
8 7 6
EM8 EM7 EM6 EM5
rw rw rw
RM0444 Rev 5
21 20 19 18
IM20 IM19 IM18
rw rw rw rw
5 4 3 2
IM5 IM4 IM3 IM2
rw rw rw rw
21 20 19 18
EM20 EM19 EM18
rw rw rw rw
5 4 3 2
EM4 EM3 EM2
rw rw rw rw
RM0444
17 16
IM17 IM16
rw rw
1 0
IM1 IM0
rw rw
17 16
EM17 EM16
rw rw
1 0
EM1 EM0
rw rw