Figure 181. Control Circuit In Normal Mode, Internal Clock Divided By 1; Figure 182. Ti2 External Clock Connection Example - ST STM32G0 1 Series Reference Manual

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General-purpose timers (TIM2/TIM3/TIM4)

Figure 181. Control circuit in normal mode, internal clock divided by 1

CEN=CNT_EN
Counter clock = CK_CNT = CK_PSC
Counter register
External clock source mode 1
This mode is selected when SMS=111 in the TIMx_SMCR register. The counter can count at
each rising or falling edge on a selected input.
TIMx_CH2
TI2[0]
TI2
Filter
TI2[1..15]
ICF[3:0]
TIMx_CCMR1
1. Codes ranging from 01000 to 11111: ITRy.
For example, to configure the upcounter to count in response to a rising edge on the TI2
input, use the following procedure:
1.
Select the proper TI2x source (internal or external) with the TI2SEL[3:0] bits in the
TIMx_TISEL register.
2.
Configure channel 2 to detect rising edges on the TI2 input by writing CC2S= '01 in the
TIMx_CCMR1 register.
3.
Configure the input filter duration by writing the IC2F[3:0] bits in the TIMx_CCMR1
register (if no filter is needed, keep IC2F=0000).
640/1390
Internal clock
UG
CNT_INIT
31

Figure 182. TI2 external clock connection example

TI2F_Rising
Edge
detector
TI2F_Falling
3 2
33 34
35 36
TIMx_SMCR
TS[4:0]
ITRx
000xx
TI1_ED
00100
TI1FP1
00101
0
TI2FP2
00110
1
ETRF
00111
(1)
CC2P
TIMx_CCER
RM0444 Rev 5
00
02
01
03 04 05
TI2F
or
or
TI1F
or
Encoder
mode
TRGI
External clock
mode 1
External clock
ETRF
mode 2
Internal clock
CK_INT
mode
(internal clock)
ECE
SMS[2:0]
TIMx_SMCR
RM0444
06
07
MS31085V2
CK_PSC
MSv40117V1

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