RM0444
WRP1B address option bytes
Flash memory address: 0x1FFF 7820
Reset value: 0x0000 00FF (ST production value)
31
30
29
Res.
Res.
Res.
15
14
13
Res.
Res.
Res.
Bits 31:23 Reserved, must be kept at reset value.
Bits 22:16 WRP1B_END[6:0]: WRP area B end offset (Bank 1)
Note: Values corresponding to addresses outside the Main memory are not allowed.
Bits 15:7 Reserved, must be kept at reset value.
Bits 6:0 WRP1B_STRT[6:0]: WRP area B start offset (Bank 1)
Note: Values corresponding to addresses outside the Main memory are not allowed.
PCROP1B start address option bytes
Flash memory address: 0x1FFF 7828
Reset value: 0xFFFF FFFF (ST production value)
31
30
29
Res.
Res.
Res.
Res.
15
14
13
Res.
Res.
Res.
Res.
Bits 31:9 Reserved, must be kept at reset value.
Bits 8:0 PCROP1B_STRT[8:0]: PCROP1B area start offset (Bank 1)
Note: Values corresponding to addresses outside the Main memory are not allowed.
PCROP1B end address option bytes
Flash memory address: 0x1FFF 7830
Reset value: 0x0000 0000 (ST production value)
28
27
26
25
Res.
Res.
Res.
Res.
12
11
10
9
Res.
Res.
Res.
Res.
WRP1B_END contains the offset of the last page of the WRP area B (in Bank 1 for dual-
bank devices).
WRP1B_STRT contains the offset of the first page of the WRP area B (in Bank 1 for dual-
bank devices).
28
27
26
25
Res.
Res.
Res.
12
11
10
9
Res.
Res.
Res.
PCROP1B_STRT contains the offset of the first PCROP subpage of the PCROP1B area (in
Bank 1 for dual-bank devices).
24
23
22
Res.
Res.
r
8
7
6
Res.
Res.
r
24
23
22
Res.
Res.
Res.
Res.
8
7
6
r
r
r
RM0444 Rev 5
Embedded Flash memory (FLASH)
21
20
19
18
WRP1B_END[6:0]
r
r
r
r
5
4
3
2
WRP1B_STRT[6:0]
r
r
r
r
21
20
19
18
Res.
Res.
Res.
5
4
3
2
PCROP1B_STRT[8:0]
r
r
r
r
17
16
r
r
1
0
r
r
17
16
Res.
Res.
1
0
r
r
85/1390
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