Power control (PWR)
Exiting Shutdown mode
The MCU exits Shutdown mode according to section
reset occurs when exiting from Shutdown mode. All registers (except for the ones in the
RTC domain) are reset after wakeup from Shutdown.
Refer to
mode.
Characteristic
Mode entry
Mode exit
Wakeup latency
4.3.10
Auto-wakeup from low-power mode
The RTC can be used to wakeup the MCU from low-power mode without depending on an
external interrupt (Auto-wakeup mode). The RTC provides a programmable time base for
waking up from Stop (0, 1), Shutdown or Standby modes at regular intervals. For this
purpose, two of the three alternative RTC clock sources can be selected by programming
the RTCSEL[1:0] bits in the
•
Low-power 32.768 kHz external crystal oscillator (LSE OSC)
This clock source provides a precise time base with very low-power consumption.
•
Low-power internal RC Oscillator (LSI)
This clock source has the advantage of saving the cost of the 32.768 kHz crystal. This
internal RC Oscillator is designed to add minimum power consumption.
To wake up from Stop mode with an RTC alarm or an RTC wakeup event, it is necessary to:
•
Configure the EXTI Line 19 to be sensitive to rising edge.
•
Configure the RTC to generate the wakeup event.
To wake up from Standby or Shutdown mode, there is no need to configure the EXTI line 19.
142/1390
Table 33: Shutdown mode summary
Table 33. Shutdown mode summary
WFI (Wait for Interrupt) or WFE (Wait for Event) while:
– SLEEPDEEP bit is set in Cortex
– No interrupt (for WFI) or event (for WFE) is pending
– LPMS[2:0] = 1XX in
– WUFx bits are cleared in
On return from ISR while:
– SLEEPDEEP bit is set in Cortex
– SLEEPONEXT = 1
– No interrupt is pending
– LPMS[2:0] = 1XX in
– WUFx bits are cleared in
– The RTC flag corresponding to the chosen wakeup source (RTC
WKUPx pin edge, RTC event, external Reset on NRST pin
Reset phase
RTC domain control register
for more details on how to exit Shutdown
Power control register 1 (PWR_CR1)
Power control register 1 (PWR_CR1)
Alarm A, RTC Alarm B, RTC wakeup, tamper or timestamp flags) is
cleared
RM0444 Rev 5
Exiting low-power
modes. A power-on
Description
®
-M0+ system control register
Power status register 1 (PWR_SR1)
®
-M0+ system control register
Power status register 1 (PWR_SR1)
(RCC_BDCR):
RM0444
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