ST STM32G0 1 Series Reference Manual page 297

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RM0444
Offset
Register
DMA_CNDTR7
0x084
Reset value
DMA_CPAR7
0x088
Reset value
DMA_CMAR7
0x08C
Reset value
Refer to
Table 50. DMA register map and reset values (continued)
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Section 2.2
for the register boundary addresses.
Direct memory access controller (DMA)
0
PA[31:0]
0
0
0
0
0
0
0
0
0
MA[31:0]
0
0
0
0
0
0
0
0
0
RM0444 Rev 5
NDTR[15:0]
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0 0
0
0
0
0
0 0
0
0
0
0
0 0
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