Figure 42. Single Conversions Of A Sequence, Hardware Trigger; Figure 43. Continuous Conversions Of A Sequence, Hardware Trigger - ST STM32G0 1 Series Reference Manual

Analog-to-digital converter (ADC)

Figure 42. Single conversions of a sequence, hardware trigger

(1)
ADSTART
EOC
EOS
(1)
TRGx
(2)
ADC state
ADC_DR
by S/W
triggered
1. EXTSEL = TRGx (over-frequency), EXTEN = 01 (rising edge), CONT = 0
2. CHSEL = 0xF, SCANDIR = 0, WAIT = 0, AUTOFF = 0

Figure 43. Continuous conversions of a sequence, hardware trigger

(1)
ADSTART
EOC
EOS
ADSTP
(1)
TRGx
(2)
ADC state
ADC_DR
by S/W
triggered
1. EXTSEL = TRGx, EXTEN = 10 (falling edge), CONT = 1
2. CHSEL = 0xF, SCANDIR = 0, WAIT = 0, AUTOFF = 0
362/1390
RDY CH0
by H/W
ignored
RDY CH0 CH1 CH2
D0
by H/W
ignored
CH1 CH2 CH3
D0 D1 D2
CH3 CH0 CH1
D1 D2 D3 D0
RM0444 Rev 5
RDY CH0 CH1 CH2
D3 D0 D1
CH2 CH3 CH0
D1 D2 D3
RM0444
CH3 RDY
D2 D3
MSv30340V2
STOP RDY
MSv30341V2