Tim1 Alternate Function Option Register 1 (Tim1_Af1) - ST STM32G0 1 Series Reference Manual

RM0444
21.4.27

TIM1 alternate function option register 1 (TIM1_AF1)

Address offset: 0x60
Reset value: 0x0000 0001
31 30 29
Res. Res. Res. Res.
15 14 13
ETRSEL[1:0] Res.
CMP3P
rw rw
Bits 31:18 Reserved, must be kept at reset value.
Bits 17:14 ETRSEL[3:0]: ETR source selection
Note: These bits can not be modified as long as LOCK level 1 has been programmed (LOCK
Bit 13 Reserved, must be kept at reset value.
Bit 12 BKCMP3P: BRK COMP3 input polarity
Note: This bit can not be modified as long as LOCK level 1 has been programmed (LOCK bits
Note: This bit is available on STM32G0B1xx and STM32G0C1xx salestypes only), reserved
Bit 11 BKCMP2P: BRK COMP2 input polarity
Note: This bit can not be modified as long as LOCK level 1 has been programmed (LOCK bits
28 27 26 25
Res. Res. Res.
12 11 10 9
BK BK BK
BKINP
CMP2P CMP1P
rw rw rw rw
These bits select the ETR input source.
0000: ETR legacy mode
0001: COMP1 output
0010: COMP2 output
0011: ADC1 AWD1
0100: ADC1 AWD2
0101: ADC1 AWD3
0110: COMP3 output (available on STM32G0B1xx and STM32G0C1xx salestypes only)
Others: Reserved
bits in TIMx_BDTR register).
This bit selects the COMP3 input sensitivity. It must be programmed together with the BKP
polarity bit.
0: COMP3 input polarity is not inverted (active low if BKP=0, active high if BKP=1)
1: COMP3 input polarity is inverted (active high if BKP=0, active low if BKP=1)
in TIMx_BDTR register).
otherwise.
This bit selects the COMP2 input sensitivity. It must be programmed together with the BKP
polarity bit.
0: COMP2 input polarity is not inverted (active low if BKP=0, active high if BKP=1)
1: COMP2 input polarity is inverted (active high if BKP=0, active low if BKP=1)
in TIMx_BDTR register).
24 23 22
Res. Res. Res.
8 7 6
Res. Res. Res.
RM0444 Rev 5
Advanced-control timer (TIM1)
21 20 19 18
Res. Res. Res. Res.
5 4 3 2
BK BK
Res. Res.
CMP3E CMP2E
rw rw
17 16
ETRSEL[3:2]
rw rw
1 0
BK
BKINE
CMP1E
rw rw
617/1390
624