ST STM32G0 1 Series Reference Manual page 165

RM0444
•
CEC, with these clock sources to select from:
–
–
•
RTC, with these clock sources to select from:
–
–
–
The functionality in Stop mode (including wakeup) is supported only when the clock is
LSI or LSE.
•
IWDG, always clocked with LSI clock.
•
USB, with these clocks to select from:
–
–
–
•
FDCAN, with these clocks to select from:
–
–
–
•
SysTick (Cortex
–
–
The selection is done through SysTick control and status register.
HCLK is used as Cortex
programming manual PM0223.
HSI16 clock divided by 488
LSE
LSE
LSI
HSE clock divided by 32
HSE
HSI48
PLLQCLK
HSE
PCLK
PLLQCLK
®
core system timer), with these clock sources to select from:
HCLK (AHB clock)
HCLK clock divided by 8
®
-M0+ free-running clock (FCLK). For more details, refer to the
RM0444 Rev 5
Reset and clock control (RCC)
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