ST STM32G0 1 Series Reference Manual page 87

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RM0444
Bits 31:9 Reserved, must be kept at reset value.
Bits 8:0 PCROP2A_END[8:0]: PCROP2A area end offset, Bank 2
Note: Values corresponding to addresses outside the Main memory are not allowed.
WRP2A address option bytes
Flash memory address: 0x1FFF 7848
Reset value: 0x0000 00FF (ST production value)
31
30
29
Res.
Res.
Res.
15
14
13
Res.
Res.
Res.
Bits 31:23 Reserved, must be kept at reset value.
Bits 22:16 WRP2A_END[6:0]: WRP area A end offset, Bank 2
Note: Values corresponding to addresses outside the Main memory are not allowed.
Bits 15:7 Reserved, must be kept at reset value.
Bits 6:0 WRP2A_STRT[6:0]: WRP area A start offset, Bank 2
Note: Values corresponding to addresses outside the Main memory are not allowed.
WRP2B address option bytes
Flash memory address: 0x1FFF 7850
Reset value: 0x0000 00FF (ST production value)
31
30
29
Res.
Res.
Res.
15
14
13
Res.
Res.
Res.
PCROP2A_END contains the offset of the last PCROP subpage of the PCROP2A area in
Bank 2 of dual-bank devices.
28
27
26
25
Res.
Res.
Res.
Res.
12
11
10
9
Res.
Res.
Res.
Res.
WRP2A_END contains the offset of the last page of the WRP area A in Bank 2 of dual-bank
devices.
WRP2A_STRT contains the offset of the first page of the WRP area A in BAnk 2 of dual-
bank devices.
28
27
26
25
Res.
Res.
Res.
Res.
12
11
10
9
Res.
Res.
Res.
Res.
24
23
22
Res.
Res.
r
8
7
6
Res.
Res.
r
24
23
22
Res.
Res.
r
8
7
6
Res.
Res.
r
RM0444 Rev 5
Embedded Flash memory (FLASH)
21
20
19
18
WRP2A_END[6:0]
r
r
r
r
5
4
3
2
WRP2A_STRT[6:0]
r
r
r
r
21
20
19
18
WRP2B_END[6:0]
r
r
r
r
5
4
3
2
WRP2B_STRT[6:0]
r
r
r
r
17
16
r
r
1
0
r
r
17
16
r
r
1
0
r
r
87/1390
118

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