Tamper And Backup Registers (Tamp); Introduction; Tamp Main Features - ST STM32G0 1 Series Reference Manual

Tamper and backup registers (TAMP)

31 Tamper and backup registers (TAMP)
31.1

Introduction

5 32-bit backup registers are retained in all low-power modes and also in V
can be used to store sensitive data as their content is protected by an tamper detection
circuit. Up to 3 tamper pins and 4 internal tampers are available for anti-tamper detection.
The external tamper pins can be configured for edge detection, or level detection with or
without filtering.
31.2

TAMP main features

•
5 backup registers:
–
•
Up to 3 external tamper detection events.
–
•
4 internal tamper events.
•
Any tamper detection can generate a RTC timestamp event.
•
Any tamper detection can erase the backup registers.
912/1390
the backup registers (TAMP_BKPxR) are implemented in the RTC domain that
remains powered-on by V
External passive tampers with configurable filter and internal pull-up.
when the V
BAT DD
RM0444 Rev 5
BAT
power is switched off.
RM0444
mode. They