Discontinuous Mode (Discen); Programmable Resolution (Res) - Fast Conversion Mode - ST STM32G0 1 Series Reference Manual

RM0444
Refer to
list of all the external triggers that can be used for regular conversion.
The software source trigger events can be generated by setting the ADSTART bit in the
ADC_CR register.
Note: The trigger selection can be changed only when the ADC is not converting (ADSTART = 0).
15.4.1

Discontinuous mode (DISCEN)

This mode is enabled by setting the DISCEN bit in the ADC_CFGR1 register.
In this mode (DISCEN = 1), a hardware or software trigger event is required to start each
conversion defined in the sequence. On the contrary, if DISCEN = 0, a single hardware or
software trigger event successively starts all the conversions defined in the sequence.
Example:
•
DISCEN = 1, channels to be converted = 0, 3, 7, 10
–
–
–
–
–
–
–
•
DISCEN = 0, channels to be converted = 0, 3, 7, 10
–
–
Note: It is not possible to have both discontinuous mode and continuous mode enabled: it is
forbidden to set both bits DISCEN = 1 and CONT = 1.
15.4.2

Programmable resolution (RES) - Fast conversion mode

It is possible to obtain faster conversion times (t
The resolution can be configured to be either 12, 10, 8, or 6 bits by programming the
RES[1:0] bits in the ADC_CFGR1 register. Lower resolution allows faster conversion times
for applications where high data precision is not required.
Note: The RES[1:0] bit must only be changed when the ADEN bit is reset.
The result of the conversion is always 12 bits wide and any unused LSB bits are read as
zeros.
Lower resolution reduces the conversion time needed for the successive approximation
steps as shown in
Table 70: External triggers
1st trigger: channel 0 is converted and an EOC event is generated
2nd trigger: channel 3 is converted and an EOC event is generated
3rd trigger: channel 7 is converted and an EOC event is generated
4th trigger: channel 10 is converted and both EOC and EOS events are
generated.
5th trigger: channel 0 is converted an EOC event is generated
6th trigger: channel 3 is converted and an EOC event is generated
...
1st trigger: the complete sequence is converted: channel 0, then 3, 7 and 10. Each
conversion generates an EOC event and the last one also generates an EOS
event.
Any subsequent trigger events restarts the complete sequence.
Table 73.
in Section 15.3.1: ADC pins and internal signals
) by reducing the ADC resolution.
SAR
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