Dmamux Functional Description; Dmamux Block Diagram; Figure 23. Dmamux Block Diagram - ST STM32G0 1 Series Reference Manual

DMA request multiplexer (DMAMUX)
11.4

DMAMUX functional description

11.4.1

DMAMUX block diagram

Figure 23
DMAMUX
p
DMA requests
from peripherals:
1
dmamux_req_inx
0
Control registers
DMAMUX features two main sub-blocks: the request line multiplexer and the request line
generator.
The implementation assigns:
•
DMAMUX request multiplexer sub-block inputs (dmamux_reqx) from peripherals
(dmamux_req_inx) and from channels of the DMAMUX request generator sub-block
(dmamux_req_genx)
•
DMAMUX request outputs to channels of DMA controllers (dmamux_req_outx)
•
Internal or external signals to DMA request trigger inputs (dmamux_trgx)
•
Internal or external signals to synchronization inputs (dmamux_syncx)
302/1390
shows the DMAMUX block diagram.

Figure 23. DMAMUX block diagram

32-bit AHB bus
AHB slave
interface
Request generator
n
Channel n
DMAMUX_RGCnCR
1
Channel 1
DMAMUX_RGC1CR
0
Channel 0
DMAMUX_RGC0CR
t 1 0
Trigger inputs:
dmamux_ovr_it
dmamux_trgx
dmamux_hclk
Request multiplexer
Channel m
DMAMUX_CmCR
Channel 1
Channel 0
DMAMUX_C0CR
Channel
select
n+p+2
n+3
Sync
n+2
n+1
s
2
1
Interrupt
interface
s
Interrupt:
Synchronization inputs:
dmamux_syncx
RM0444 Rev 5
Ctrl
m
1
0
m
1
0
1 0
1 0
RM0444
DMA requests
to DMA controllers:
dmamux_req_outx
DMA channels
events:
dmamux_evtx
MSv39745V1