Renesas H8S/2319 series Hardware Manual page 998

ABWCR—Bus Width Control Register
Bit :
ABW7
Modes 5 to 7*
Initial value :
R/W : R/W
Mode 4
Initial value :
Read/Write : R/W
Note: * Modes 6 and 7 cannot be used in the ROMless versions.
ASTCR—Access State Control Register
Bit :
AST7
Initial value :
Read/Write : R/W
Rev. 5.00, 12/03, page 968 of 1088
7 6 5
ABW6 ABW5
1 1 1
R/W R/W
0 0 0
R/W R/W
7 6 5
AST6 AST5
1 1 1
R/W R/W
Area 7 to 0 Access State Control
0 Area n is designated for 2-state access
Wait state insertion in area n external space is disabled
1 Area n is designated for 3-state access
Wait state insertion in area n external space is enabled
H'FED0
4 3
ABW4 ABW3 ABW2
1 1
R/W R/W R/W
0 0
R/W R/W R/W
Area 7 to 0 Bus Width Control
0 Area n is designated for 16-bit access
1 Area n is designated for 8-bit access
H'FED1
4 3
AST4 AST3 AST2
1 1
R/W R/W R/W
Bus Controller
2 1 0
ABW1 ABW0
1 1 1
R/W R/W
0 0 0
R/W R/W
(n = 7 to 0)
Bus Controller
2 1 0
AST1 AST0
1 1 1
R/W R/W
(n = 7 to 0)