Table of Contents
Advertisement
P2DDR—Port 2 Data Direction Register
Bit
:
P27DDR
Initial value
:
Read/Write
:
P3DDR—Port 3 Data Direction Register
Bit
:
Initial value
:
Undefined
Read/Write
:
PADDR—Port A Data Direction Register
Bit
:
Initial value
:
Undefined
Read/Write
:
Rev. 5.00, 12/03, page 964 of 1088
7
6
5
P26DDR
P25DDR
0
0
0
W
W
W
Specify input or output for individual port 2 pins
7
6
5
P35DDR
Undefined
0
W
7
6
Undefined
Undefined
4
3
P24DDR
P23DDR
0
0
W
W
4
3
P34DDR
P33DDR
0
0
W
W
Specify input or output for individual port 3 pins
5
4
3
PA3DDR
Undefined
0
W
H'FEB1
2
1
P22DDR
P21DDR
0
0
W
W
H'FEB2
2
1
P32DDR
P31DDR
0
0
W
W
H'FEB9
2
1
PA2DDR
PA1DDR
0
0
W
W
Specify input or output for
individual port A pins
Port 2
0
P20DDR
0
W
Port 3
0
P30DDR
0
W
Port A
0
PA0DDR
0
W
Advertisement
Table of Contents
