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MB96300 Super Series Hardware Manual
Table B.8-16 21 Bit operand instructions
Mnemonic
#
MOVB
A,dir:bp
3
MOVB
A,addr16:bp
4
MOVB
A,io:bp
3
MOVB
dir:bp,A
3
MOVB
addr16:bp,A
4
MOVB
io:bp,A
3
SETB
dir:bp
3
SETB
addr16:bp
4
SETB
io:bp
3
CLRB
dir:bp
3
CLRB
addr16:bp
4
CLRB
io:bp
3
BBC
dir:bp,rel
4
BBC
addr16:bp,rel
5
BBC
io:bp,rel
4
BBS
dir:bp,rel
4
BBS
addr16:bp,rel
5
BBS
io:bp,rel
4
SBBS
addr16:bp,rel
5
WBTS
io:bp
3
WBTC
io:bp
3
Table B.8-17 6 Accumulator operation instructions (byte, word)
Mnemonic
#
SWAP
1
SWAPW / XCHW A,T
1
EXT
1
EXTW
1
ZEXT
1
ZEXTW
1
B
Operation
byte (A) <-- (dir:bp)b
byte (A) <-- (addr16:bp)b
byte (A) <-- (io:bp)b
bit (dir:bp)b <-- (A)
bit (addr16:bp)b <-- (A)
bit (io:bp)b <-- (A)
bit (dir:bp)b <-- 1
bit (addr16:bp)b <-- 1
bit (io:bp)b <-- 1
bit (dir:bp)b <-- 0
bit (addr16:bp)b <-- 0
bit (io:bp)b <-- 0
Branch on (dir:bp) b = 0
Branch on (addr16:bp) b = 0
Branch on (io:bp) b = 0
Branch on (dir:bp) b = 1
Branch on (addr16:bp) b = 1
Branch on (io:bp) b = 1
Branch on (addr16:bp) b = 1, bit = 1
Waits until (io:bp) b = 1
Waits until (io:bp) b = 0
B
Operation
byte (A)0-7 <--> (A)8-15
word (AH) <--> (AL)
Byte sign extension
Word sign extension
Byte zero extension
Word zero extension
APPENDIX B Instructions
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