Fujitsu MB96300 series Hardware Manual page 1036

F2mc-16fx 16-bit
Hide thumbs Also See for MB96300 series:
Table of Contents

Advertisement

REVISION HISTORY
REVISION HISTORY
Revision
Date
4
2006-08-04
4
2006-08-04
4
2006-08-04
5
2006-08-07
5
2006-08-07
5
2006-08-08
5
2006-08-08
5
2006-08-08
5
2006-08-08
5
2006-08-08
5
2006-08-08
5
2006-08-08
5
2006-08-10
5
2006-08-10
5
2006-08-10
1028
Added MB96F348R/Y, MB96F348H/T
Table 1.2-1 "Product Lineup"
Figure 1.6-2 "Pin assignment of MB96(F)34x (QFP package)"
Figure 1.6-3 "Pin assignment of MB96(F)34x (LQFP package)"
Table 1.8-1
Table 1.14-1
APPENDIX A "I/O Map of MB96V300"
Added Flash memory control signal AQ19 to AQ21
Table 1.8-1 "Flash memory control signals MB96F34X"to
Table 1.8-4 "Flash memory control signals MB96F38X"
Changed description of Flash programming to be compliant with MBM29LV200
description
Table 34.5-1
Corrected number of USARTs in product line-up
Table 1.2-1
Table D-2 "Interrupt vector table MB96(F)34x"
Corrected availability of Satellite Flash memory interrupt
Corrected number of SMC channels in MB96F38x.
Table 1.2-1 "Product Lineup"
Corrected description of Free Running Timer: software clear and clock selection.
Figure 15.3-1 "16-bit Free-Running Timer block diagram"
Table 15.3-2
Corrected description of OCU on MB96F38x
Table 1.12-2 "Connection between Output Compare Units and Free Running
Timers"
Added note, that port input is disabled when MCU enters Stop or Timer mode.
Section 14.2.4 "Port Input Enable Register (PIERnn)"
Added CHAPTER 8 "CLOCK MODULATOR"
Corrected description of USART Baud Rate Generator
Figure 21.4-8 "Baud rate generator register (BGRn)"
Added description of USART ECCR:INV bit.
Section 21.4.6 "Extended Communication Control Register (ECCRn)"
Added detailed description of reset cause for each register.
Section 25.2 "Real Time Clock Registers"
Added description of WOT pin function
Figure 25.3-2 "WOT pin operation"
Corrected Sound generator description
Figure 29.1-1 "Block diagram of Sound Generator"
Figure 29.2-2 "Configuration of the Sound Generator Control Register
(SGCRHn)"
Corrected Alarm comparator mode description
MB96300 Super Series Hardware Manual
Modification

Advertisement

Table of Contents
loading

Table of Contents