Processor End-Of-Interrupt Register (Eoi) - Motorola MPC8240 User Manual

Integrated host processor with integrated pci
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Register Definitions
Figure 11-18 shows the bits of the IACK.
31
Figure 11-18. Processor Interrupt Acknowledge Register (IACK)
Table 11-25 shows the bit settings of the IACK.
Table 11-25. IACK Field Descriptions—Offset 0x6_00A0
Bits
Name
31–8
7–0
VECTOR

11.9.10 Processor End-of-Interrupt Register (EOI)

A write to the EOI signals the end of processing for the highest priority interrupt currently
in service by the processor. The write to EOI updates the ISR by retiring the highest priority
interrupt. Data values written to this register are ignored, and zero is assumed. Reading this
register returns zeros (this register is considered write-only). Figure 11-19 shows the bits
of the EOI.
31
Figure 11-19. Processor End of Interrupt Register (EOI)
Table 11-26 shows the bit settings for the EOI.
Table 11-26. EOI Field Descriptions—Offset 0x6_00B0
Bits
Name
31–4
3–0
EOI_CODE
11-28
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Reset
Value
All 0s
Reserved
0x0
Interrupt vector. When this register is read, this field returns the vector of the
highest pending interrupt in the EPIC unit.
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Reset
Value
Reserved
0000
MPC8240 Integrated Processor User's Manual
VECTOR
8
7
Description
Description
Reserved
0
Reserved
EOI_CODE
4
3
0

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