Handshaking - Motorola MPC8240 User Manual

10.2.8 Handshaking

The clock synchronization mechanism can be used as a handshake in data transfer. Slave
devices can hold the SCL low after completion of one byte transfer (9 bits). In such cases,
it halts the bus clock and forces the master clock into wait states until the slave releases the
SCL line.
10.2.9 Clock Stretching
Slaves can use the clock synchronization mechanism to slow down the transfer bit rate.
After the master has driven the SCL line low, the slave can drive SCL low for the required
period and then release it. If the slave SCL low period is greater than the master SCL low
period, then the resulting SCL bus signal low period is stretched.
2
10.3 I C Register Descriptions
This section describes the I
Even though reserved fields return 0, this should not be
assumed by the programmer. Reserved bits should always be
written with the value they returned when read. In other words,
the register should be programmed by reading the value,
modifying the appropriate fields, and writing back the value.
This does not apply to the I
2
The I C registers in this chapter are shown in little-endian format. If the system is
big-endian, software must swap the bytes appropriately.
2
10.3.1 I C Address Register (I2CADR)
The I2CADR, shown in Figure 10-3, contains the address that the I
when addressed as a slave. Note that it is not the address sent on the bus during the address
calling cycle when the MPC8240 is in master mode.
31
2
C registers in detail.
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
2
Figure 10-3. I C Address Register (I2CADR)
Chapter 10. I
NOTE:
2
C data register (I2CDR).
2
C Interface
2
I C Register Descriptions
2
C interface responds to
Reserved
ADDR 0
8 7 1 0
10-7