Motorola MPC8240 User Manual page 639

TLB management instructions, D-25
TMS (JTAG test mode select) signal, 2-32, 15-21
Transactions
error transactions, 7-30
PCI bus
fast back-to-back transactions, 7-21
read transactions, 7-14
write transactions, 7-14
PCI transaction termination, 7-17
retry PCI transactions, 7-18
Transfers
DMA transfers
local memory to local memory, 8-9
local memory to PCI, 8-9
PCI to local memory, 8-9
PCI to PCI, 8-9
TRDY (target ready) signal, 2-13, 7-9, 7-17
TRIG_IN (watchpoint trigger in) signal, 2-29
TRIG_OUT (watchpoint trigger out) signal, 2-29
TRST (JTAG test reset) signal, 2-32, 15-21
Turnaround cycle and PCI bus, 7-14
V
VEA (virtual environment architecture)
register set, E-10
time base, E-10
W
WE (write enable) signal, 2-18
X
XER register
bit definitions, E-8
INDEX
Index Index-15