The Mpc8240 Sdram Ecc Syndrome Encoding (Data Bits 0:31) - Motorola MPC8240 User Manual

SDRAM Interface Operation
The in-line ECC and parity data path option allows the MPC8240 to detect and
automatically correct single bit ECC errors; detect multiple bit ECC errors or parity errors
with only one clock cycle penalty on CPU and PCI memory read operations; and generate
parity for the internal processor data bus. For CPU and PCI memory write operations, parity
can be checked automatically on the internal processor data bus and either ECC or parity
generated for the memory bus. Table 6-8 and Table 6-9 describe the configuration
requirements for this mode.
The in-line ECC logic in the MPC8240 detects and corrects all single-bit errors and detects
all double-bit errors and all errors within a nibble. Other errors are not guaranteed to be
detected or corrected. Multiple-bit errors are always reported if detected. However, when a
single-bit error occurs, the value in the ECC single bit error counter register is compared to
the ECC single bit error trigger register. If the values are not equal, no error is reported; if
the values are equal, then an error is reported. Thus, the single-bit error registers may be
programmed so that minor faults with memory are corrected and ignored, but a catastrophic
memory failure generates an interrupt. See Section 4.8.1, "ECC Single-Bit Error
Registers," for more information on these registers.
The MPC8240 supports concurrent ECC for the memory data path and parity for the local
processor data path. ECC and parity may be independently enabled or disabled. The eight
signals used for ECC (PAR[0:7]) are also used for processor core parity. The MPC8240
checks ECC on 64-bit memory reads.
The syndrome equations for the ECC codes are shown in Table 6-12 and Table 6-13.
Table 6-12. The MPC8240 SDRAM ECC Syndrome Encoding (Data Bits 0:31)
Syndrome
Bit
0 1 2 3 4 5 6 7 8 9
0 x x x x x x x x x x x x x x x x
1 x
2 x
3 x
4 x
5
6
7 x x x x
6-28
1 1 1
0 1 2
x x x
x x
x x
x x
x x x x x x x x
x x x x x x x x
x x x x x x x
MPC8240 Integrated Processor User's Manual
Data Bit
1 1 1 1 1 1 1 2 2
3 4 5 6 7 8 9 0 1
x
x x x x x x x x x x x x x x x x
x x x
x x x
x x x
x x x x
2 2 2 2 2 2 2 2 3
2 3 4 5 6 7 8 9 0
x x
x x
x x
x x x x x x
x x x x
x x x x x x x x
x x x x x
3
1
x