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Freescale Semiconductor, Inc.
MPC821FADS
User's Manual
Motorola reserves the right to make changes without further notice to any products herein. Motorola makes no warranty, representation or guarantee regarding
the suitability of its products for any particular purpose, nor does Motorola assume any liability arising out of the application or use of any product or circuit, and
specifically disclaims any and all liability, including without limitation consequential or incidental damages. "Typical" parameters can and do vary in different
applications. All operating parameters, including "Typicals" must be validated for each customer application by customer's technical experts. Motorola does not
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© 1998 Motorola, Inc. All Rights Reserved.
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Summary of Contents for Motorola MPC821FADS

  • Page 1 Motorola reserves the right to make changes without further notice to any products herein. Motorola makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does Motorola assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation consequential or incidental damages.
  • Page 2 Freescale Semiconductor, Inc. ™ PowerPC is a registered trademark of IBM Corporation and is used by Motorola under license from IBM. ® is a registered tradmeark of Philips Corporation. All other trademarks are the property of their respective owners. For More Information On This Product,...
  • Page 3: Section 1 Introduction

    SECTION 1 INTRODUCTION This document is the MPC821FADS daughterboard operation guide. The daughterboard encompasses the MPC821 device along with some necessary logic that must be in close proximity to the MPC821 and peripherals. These peripherals are dedicated to the MPC821, but are not necessarily required for any other member of the MPC8xx Family.
  • Page 4: Specifications

    Introduction 1.3 SPECIFICATIONS The MPC821FADS daughterboard specifications are shown in Table 1-1. Table 1-1. MPC821FADS Daughterboard Specifications CHARACTERISTICS SPECIFICATIONS Microprocessor MPC821 @ 50MHz Operating temperature C – 30 Storage temperature C to 85 Relative humidity 5% to 90% (noncondensing) Dimensions: Length 5.87"...
  • Page 5 Introduction EXPANSION CONNECTORS EXPANSION EXPANSION MPC821 CONNECTORS CONNECTORS DAUGHTER BOARD CLOCKS Figure 1-1. MPC821FADS Daughterboard Block Diagram MOTOROLA MPC821FADS-DB USER’S MANUAL...
  • Page 6: Section 2 Installation

    If the contents were damaged during shipping, call your local Motorola sales office, explain the problem, and you should receive another package. If the contents are undamaged, save the packing slip and start configuring the board for your design.
  • Page 7 Installation HALO Figure 2-1. MPC821FADS Daughterboard Parts Locator (Top Side) MPC821FADS-DB USER’S MANUAL MOTOROLA...
  • Page 8 Since the MPC821 clock input is not 5V-tolerant, any clock generator inserted into U1 must have a 3.3V-compatible output. If you insert a 5V output clock generator into U1, you could cause permanent damage to the MPC821 microprocessor. MOTOROLA MPC821FADS-DB USER’S MANUAL...
  • Page 9 To select your power-on reset source, you need to set J1 on the MPC821FADS daughterboard. When the J1 jumper is between positions 1 and 2, a power-on reset is generated by the keep-alive power rail (KAPWR). For example, when KAPWR goes below 2.005V, a power-on reset is generated.
  • Page 10 When the J3 jumper is between positions 2 and 3, VDDL is supplied with 2.2V of power. The J3 jumper is factory set between positions 1 and 2. 3.3V VDDL 2V VDDL Figure 2-5. VDDL Source MOTOROLA MPC821FADS-DB USER’S MANUAL...
  • Page 11: Section 3 Operation

    This section contains the necessary information you need to operate the MPC821FADS daughterboard. 3.1 INDICATORS The MPC821FADS daughterboard does not have any switches, but it has five indicators. 3.1.1 Ground Bridges There are four ground (GND) bridges on the MPC821FADS daughterboard. They can be used to assist you with easy ground access points for general measurements and a logic analyzer connection.
  • Page 12: Section 4 Functionality

    • Soft reset 4.1.1 Power-On Reset On the MPC821FADS daughterboard, a power-on reset can be generated from a keep-alive power bus or a main power bus. The J1 jumper is used to select one of these sources. When you select the keep-alive power source, a dedicated voltage detector made by Seiko (S-8051HN-CD-X), which has a detection voltage range of 1.795–2.005V, generates the...
  • Page 13: Hard Reset

    This connector contains the MPC821 Port D pins. The LCD connector is a superset of the LCD connector on the MPC821FADS board, which makes it easy to move tools between the two boards and to connect the additional color bits.
  • Page 14: Board Control And Status Registers

    Most board control and status register (BCSR) control signals and some of the status signals are available on the motherboard connectors and on the expansion connectors. The BCSRs control most of the functions available on the MPC821FADS daughterboard and the MPC8xxFADS motherboard.
  • Page 15: Section 5 Signal Descriptions

    This section contains signal information for supporting, maintaining, as well as connecting to, the MPC821FADS daughterboard. 5.1 INTERCONNECT SIGNALS The MPC821FADS daughterboard uses the following connectors to interconnect with external devices. • P1, P2, P3, P4, P5, P6, and P8—Logic analyzer connectors •...
  • Page 16 VFLS1 VFLS1 DRMCS1 DRMCS1 DRMCS2 DRMCS2 SDRMCS SDRMCS — — WAIT_B WAIT_B REG_A REG_A RESETA RESETA TSIZE1 TSIZE1 POE_A POE_A BURST BURST MODCK1 MODCK1 MODCK2 MODCK2 SPKROUT SPKROUT EXTCLK EXTCLK (KR/IRQ4) NOTE: — = Not Connected. MPC821FADS-DB USER’S MANUAL MOTOROLA...
  • Page 17 BWAITA BS3A BS3A BCD2 BCD2 BCD1 BCD1 DRM_W DRM_W EDOOE EDOOE GPL2 GPL2 BRDY BRDY GPL3 GPL3 BADDR28 BADDR28 GPL4A GPL4A BADDR29 BADDR29 GPL4B GPL4B BADDR30 BADDR30 GPL5A GPL5A GPL5B GPL5B NOTE: — = Not Connected. MOTOROLA MPC821FADS-DB USER’S MANUAL...
  • Page 18 Signal Descriptions Table 5-3. P3 Interconnect Signals MOTHER DAUGHTER MOTHER DAUGHTER BOARD BOARD BOARD BOARD SIGNAL SIGNAL SIGNAL SIGNAL — — — — — — — — NOTE: — = Not Connected. MPC821FADS-DB USER’S MANUAL MOTOROLA...
  • Page 19 — — — — PD15 PD14 PD13 PD12 PD11 PD10 PA10 PA10 VSYNC PA11 PA11 HSYNC IRDTXD IRDTXD SHIFT_C IRDRXD IRDRXD SPARE1 SPARE1 ETHTX ETHTX SPARE2 SPARE2 ETHRXS ETHRXS SPARE3 SPARE3 NOTE: — = Not Connected. MOTOROLA MPC821FADS-DB USER’S MANUAL...
  • Page 20 BVS1 BVS2 BVS2 IRQ1 IRQ1 BBVD1 BBVD1 IRQ2 IRQ2 BBVD2 BBVD2 IRQ3 IRQ3 RSTCNF RSTCNF TEXP TEXP BINPAK BINPAK HRESET HRESET SRESET SRESET PORST PORST R_PORI R_PORI IRQ7 IRQ7 — V3.3 NOTE: — = Not Connected. MPC821FADS-DB USER’S MANUAL MOTOROLA...
  • Page 21 RSTXD2 RSDTR2 RSDTR2 RSDTR1 RSDTR1 E_RENA E_RENA RSRXD1 RSRXD1 E_CLSN E_CLSN RSTXD1 RSTXD1 PC12 PC12 PB26 PB26 PC13. PC13. PB27 PB27 PC14 PC14 PB28 PB28 SPARE4 SPARE4 PB29 PB29 — — NOTE: — = Not Connected. MOTOROLA MPC821FADS-DB USER’S MANUAL...
  • Page 22 Signal Descriptions Table 5-7. P8 Interconnect Signals MOTHER DAUGHTER MOTHER DAUGHTER BOARD BOARD BOARD BOARD SIGNAL SIGNAL SIGNAL SIGNAL — — — — — — — — — — NOTE: — = Not Connected. MPC821FADS-DB USER’S MANUAL MOTOROLA...
  • Page 23 — LCD Data line 1 — LCD Data line 2 — LCD Data line 3 — LCD Data line 4 — LCD Data line 5 — LCD Data line 6 — LCD Data line 7 — MOTOROLA MPC821FADS-DB USER’S MANUAL...
  • Page 24 SIGNAL INPUT/OUTPUT DESCRIPTION LCD Data line 8 — — — Pin is cut to allow 30-pin connector insertion. — 5V supply — 5V supply — 5V supply NOTE: I = Input and O = Output. 5-10 MPC821FADS-DB USER’S MANUAL MOTOROLA...
  • Page 25 PCB. As shown in Figure 5-1, the connectors are set asymmetrically to prevent incorrect daughterboard insertion. 46.3mm 30.19mm 17.49mm 93.98mm Figure 5-1. Motherboard Connectors Mechanical Assembly (Top Side) MOTOROLA MPC821FADS-DB USER’S MANUAL 5-11...
  • Page 26 — GPL4B GPL4B O, L General-Purpose Line 4 of UPMB. Not used on this board. — I/O, L Read/Write signal. Pulled up on this board and used by MPC8xxFADS logic. — 5-12 MPC821FADS-DB USER’S MANUAL MOTOROLA...
  • Page 27 MPC821. Used as chip-select line for the first bank of the DRAM SIMM. Pulled up. When the DRAM is disabled via the BCSR, this signal can be used off-board via the daughterboard’s expansion connectors. — MOTOROLA MPC821FADS-DB USER’S MANUAL 5-13...
  • Page 28 Used also as RAS signal for the SDRAM. — BS0A BS0A I, L Byte Select 0 signal from UPMA. Selects offset zero bytes within a word. Used as one of the CAS lines for DRAM access. — 5-14 MPC821FADS-DB USER’S MANUAL MOTOROLA...
  • Page 29 I, TS Address line 15 — I, TS Address line 14 — I, TS Address line 13 — I, TS Address line 6 — I, TS Address line 12 — I, TS Address line 11 — MOTOROLA MPC821FADS-DB USER’S MANUAL 5-15...
  • Page 30 — I, TS Address line 22 — I, TS Address line 3. Not used on this board. — I, TS Address line 23 — I, TS Address line 4. Not used on this board. — 5-16 MPC821FADS-DB USER’S MANUAL MOTOROLA...
  • Page 31 Data Output. Used on the MPC8xxFADS as debug port serial data. If the ADI bundle is not connected to the MPC8xxFADS, this signal can be used by the external debug / JTAG port controller. — MOTOROLA MPC821FADS-DB USER’S MANUAL 5-17...
  • Page 32 MPC821 is in debug mode. — SPKROUT SPKROUT I, X Speaker Output signal. KR/IRQ4/SPKROUT on the MPC821. This signal can be configured for another function. It is mainly used for a PCMCIA notification alert. — 5-18 MPC821FADS-DB USER’S MANUAL MOTOROLA...
  • Page 33 Pulled up, but otherwise unused on this board. — I/O, L Address Strobe signal. When asserted by the external master, the MPC821 recognizes that an asynchronous cycle is in progress. Pulled up, but otherwise unused on this board. — MOTOROLA MPC821FADS-DB USER’S MANUAL 5-19...
  • Page 34 Power-On Reset signal. Not used on the MPC8xxFADS, but generated on the daughterboard. — HRESET HRESET I/O, L, OD Hard Reset signal. This signal is driven by onboard logic and may be driven by offboard logic with open-drain gate only. — 5-20 MPC821FADS-DB USER’S MANUAL MOTOROLA...
  • Page 35 PCMCIA card. — BCD1 BCD1 O, L Buffered Card Detect 1 signal for PCMCIA slot A. IP_A4 on the MPC821. Used as a card detect indication in conjunction with BCD2. — MOTOROLA MPC821FADS-DB USER’S MANUAL 5-21...
  • Page 36 IRQ1 I/O, L Interrupt Request line 1.Pulled up, but otherwise unused on this board. V3.3 V3.3 — SPARE3 SPARE3 I/O, X Spare line 3. Pulled up, but otherwise unused on this board. V3.3 V3.3 — 5-22 MPC821FADS-DB USER’S MANUAL MOTOROLA...
  • Page 37 Infra-Red Port Receive Data signal. When the I/R port is disabled via the BCSR1, this signal is three-stated. This signal also appears at P8. — IRDTXD IRDTXD I, X Infra-Red Port Transmit Data signal. Also appears at P8. MOTOROLA MPC821FADS-DB USER’S MANUAL 5-23...
  • Page 38 PB30 PB30 I/O, X Port B Bit 30. Also appears at P8, but is otherwise unused. — PB29 PB29 I/O, X Port B Bit 29. Also appears at P8, but is otherwise unused. 5-24 MPC821FADS-DB USER’S MANUAL MOTOROLA...
  • Page 39 Port B Bit 26. Also appears at P8, but is otherwise unused. — I/O, X Port A Bit 5. Also appears at P8, but is otherwise unused. — I/O, X Port A Bit 4. Also appears at P8, but is otherwise unused. MOTOROLA MPC821FADS-DB USER’S MANUAL 5-25...
  • Page 40 — — — ETHEN ETHEN O, L Ethernet Port Enable signal. It is connected to the BCSR1. — — — Not connected. IRD_EN IRD_EN O, L Infra-Red Enable signal. It is connected to the BCSR1. 5-26 MPC821FADS-DB USER’S MANUAL MOTOROLA...
  • Page 41 Also appears at P8 and a dedicated LCD connector. VSYNC VSYNC I/O, X Vertical Sync signal. PD5/FRAME/VSYNC on the MPC821. Not used on the MPC8xxFADS motherboard. Also appears at P8 and a dedicated LCD connector. MOTOROLA MPC821FADS-DB USER’S MANUAL 5-27...
  • Page 42 Twisted-Pair Full Duplex signal. Allows for full-duplex operation over a Ethernet Twisted- Pair channel. TPSQEL TPSQEL O, L Twisted-Pair Signal Quality Error Test Enable signal. MDM_AUD MDM_AUD O, L Modem Audio signal. Unused on this board. 5-28 MPC821FADS-DB USER’S MANUAL MOTOROLA...
  • Page 43 I/O, X Data line 31 — I/O, X Data line 30 — I/O, X Data line 29 — I/O, X Data line 28 — I/O, X Data line 27 — I/O, X Data line 26 MOTOROLA MPC821FADS-DB USER’S MANUAL 5-29...
  • Page 44 I/O, X Data line 17 — I/O, X Data line 16 — I/O, X Data line 15 — I/O, X Data line 14 — I/O, X Data line 13 — I/O, X Data line 12 5-30 MPC821FADS-DB USER’S MANUAL MOTOROLA...
  • Page 45 — I/O, X Data line 2 — I/O, X Data line 1 — I/O, X Data line 0 — DRMH_W DRMH_W O, L DRAM Half Word signal. Sets the DRAM to 16-bit data bus width. MOTOROLA MPC821FADS-DB USER’S MANUAL 5-31...
  • Page 46 Daughterboard ID Code 0 signal. It is part of the field which designates the type of daughterboard connected. DBID5 DBID5 I/O, X Daughterboard ID Code 5 signal. Part of the field that designates the type of daughterboard connected. 5-32 MPC821FADS-DB USER’S MANUAL MOTOROLA...
  • Page 47 Not connected. — — — — Not connected. — — — — Not connected. — — — — Not connected. — — — — Not connected. — — — — Not connected. — — — — MOTOROLA MPC821FADS-DB USER’S MANUAL 5-33...
  • Page 48 Figure 5-2. Expansion Connectors Mechanical Assembly In principle, the expansion connectors are identical in signal assignment to the motherboard connectors. However, there is a difference between PM3 and PX3, which is a result of the 5-34 MPC821FADS-DB USER’S MANUAL MOTOROLA...
  • Page 49 NOTE: O = Output and X = Don’t Care. Figure 5-4. PX3–PM3 Interconnect Signal Differences SIGNAL ATTRIBUTE DESCRIPTION — — — No Difference. Figure 5-5. PX4–PM4 Interconnect Signal Differences SIGNAL ATTRIBUTE DESCRIPTION — — — No Difference. MOTOROLA MPC821FADS-DB USER’S MANUAL 5-35...
  • Page 50 Port A Bit 9. See PM3(21). L1RXDA Receive Data signal for TDM A. See PM3(23). — — IRQ7 I, L Interrupt Request line 7. See PM2(130). Freeze signal. See PM2(24). ETHEN Ethernet Enable signal. See PM3(82). — — Not connected. 5-36 MPC821FADS-DB USER’S MANUAL MOTOROLA...
  • Page 51 Ethernet Collision signal. See PM3(61). E_RENA Ethernet Receive Enable signal. See PM3(62). USBRXP Universal Serial Bus Receive Positive signal. PC11 on the MPC821. See PM3(8). USBRXN Universal Serial Bus Receive Negative signal. PC10 on the MPC821. See PM3(14). MOTOROLA MPC821FADS-DB USER’S MANUAL 5-37...
  • Page 52 Soft Reset signal. See PM2(80). — — Not connected. — SHIFT_C Shift Clock signal. See PM3(103) Voltage Protection Input signal. The +12V input for PCMCIA flash VPPIN programming. Parallel to P7 of the MPC8xxFADS. — 5-38 MPC821FADS-DB USER’S MANUAL MOTOROLA...
  • Page 53 Vertical Sync signal. See PM3(107). NOTE: I = Input, O = Output, and L = Low. 5.2 MPC821ADS DAUGHTERBOARD PART LIST The MPC821FADS daughterboard’s bill of material is listed in Table 5-15 according to the reference designation. Table 5-15. MPC821FADS Daughterboard Part List...
  • Page 54 Signal Descriptions Table 5-15. MPC821FADS Daughterboard Part List (Continued) REFERENCE DESCRIPTION MANUFACTURER PART NUMBER # OF DESIGNATION PARTS PM1 PM2 PM3 PM4 Connector Inter-Board, 7mm Height, 028 00392 140-Pin, Plug PX1 PX2 PX3 PX4 Connector Inter-Board 140-Pin, 009 00172 Receptacle...

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