B-10 Two-Byte Transfer To Pci I/O Space—Little-Endian Mode - Motorola MPC8240 User Manual

Munge address
XOR with 110
0 1
xx xx
AD[3–0]
Figure B-10. Two-Byte Transfer to PCI I/O Space—Little-Endian Mode
Core
Processor
A[28–31] 0 1 0 0
PA[28–31]
0 0 1 0
2 3 4 5
D2 D3 xx xx
CDU
Unmunges address
Swaps byte lanes
Runs PCI I/O transaction
0 1 0 0 During address phase
3 2 1 0
xx xx D2 D3
D2 D3
PCI I/O Space
Appendix B. Bit and Byte Ordering
Byte lanes
6 7
Internal peripheral logic data bus
xx xx
PCI byte lanes (C/BE[1–0] asserted)
PCI data bus (AD[31–0] during data phase)
0x00
0x08
Little-Endian Mode
B-13