Fpm Or Edo Memory Data Interface - Motorola MPC8240 User Manual

FPM or EDO DRAM Interface Operation

6.3.3 FPM or EDO Memory Data Interface

The MPC8240 supports flow-through data path buffering for the DRAM data interface
between the internal processor bus and external memory data bus, which must be
configured as described in Table 6-19 and Table 6-20. Unspecified bit settings have
undefined behavior.
RAM_TYPE
EDO
PCKEN
WRITE _PARITY_CHK
INLRD_PARECC_CHK_EN
INLINE_PAR_NOT_ECC
BUF_TYPE[0]
BUF_TYPE[1]
RMW_PAR
ECC_EN
MEM_PARITY_ECC_EN
MB_ECC_ERR_EN
Table 6-20. FPM or EDO System Configurations
1 0 0 0
1 1 0 0
1 0 1 0
1 1 1 0
1 0 0 0
1 1 0 0
1 0 1 0
1 1 1 0
6-54
Table 6-19. FPM or EDO Memory Parameters
Bit Name Register and Offset Bit Number in Register
MCCR1 @ 0xF0
MCCR2 @ 0xF4
MCCR1 @ 0xF0
MCCR2 @ 0xF4
MCCR2 @ 0xF4
MCCR2 @ 0xF4
MCCR4 @ 0xFC
MCCR4 @ 0xFC
MCCR2 @ 0xF4
MCCR2 @ 0xF4
ErrEnR1 @ 0xC0
ErrEnR2 @ 0xC4
0 0 0 0 0
0 0 0 0 0
0 0 0 0 0
0 0 0 0 0
0 0 0 0 0
0 0 0 0 0
0 0 0 0 1
0 0 0 0 1
MPC8240 Integrated Processor User's Manual
0 0 0 FPM, flow-through, no ECC or parity
0 0 0 EDO, flow-through, no ECC or parity
0 1 0 FPM, flow-through, parity enabled
0 1 0 EDO, flow-through, parity enabled
1 1 1 FPM, flow-through, ECC enabled
1 1 1 EDO, flow-through, ECC enabled
0 1 0 FPM, RMW_PAR
0 1 0 EDO, RWM_PAR
17
16
16
19
18
20
22
20
0
17
2
3
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