Serial Bit Clock Frequency Divider Selections - Motorola MPC8240 User Manual

Integrated host processor with integrated pci
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Table 10-5 maps the I2CFDR[FDR] field to the clock divider values.
Table 10-5. Serial Bit Clock Frequency Divider Selections
FDR
Divider
(Decimal)
0x00
288
0x01
320
0x02
384
0x03
480
0x04
576
0x05
640
0x06
768
0x07
960
0x08
1152
0x09
1280
0x0A
1536
0x0B
1920
0x0C
2304
0x0D
2560
0x0E
3072
0x0F
3840
0x10
4608
0x11
5120
0x12
6144
0x13
7680
0x14
9216
0x15
10240
0x16
12288
0x17
15360
0x18
18432
0x19
20480
0x1A
24576
0x1B
30720
0x1C
36864
0x1D
40960
0x1E
49152
0x1F
61440
Chapter 10. I
FDR
Divider
(Decimal)
0x20
0x21
0x22
0x23
0x24
0x25
0x26
0x27
0x28
0x29
0x2A
0x2B
0x2C
0x2D
0x2E
0x2F
0x30
0x31
0x32
0x33
0x34
0x35
0x36
0x37
0x38
10240
0x39
12288
0x3A
14336
0x3B
16384
0x3C
20480
0x3D
24576
0x3E
28672
0x3F
32768
2
C Interface
2
I
C Register Descriptions
160
192
224
256
320
384
448
512
640
768
896
1024
1280
1536
1792
2048
2560
3072
3584
4096
5120
6144
7168
8192
10-9

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