Dma Operation Flow - Motorola MPC8240 User Manual

Integrated host processor with integrated pci
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8.3.3 DMA Operation Flow

Figure 8-2 shows a general flow diagram for the operation of the DMA controller on the
MPC8240.
Periodic mode
Save CDAR
Timer Expires.
Restore CDAR
Load the contents of
NDAR into CDAR
EOSI
otherwise
Load the parameters
from memory into
the DMA registers
Use the parameters
in the DMA registers
Read a line
from memory (or PCI)
and decrement BCR
Write a line
to memory (or PCI)
BCR = 0
otherwise
Direct mode
0
EOTD = 1
EOCAI
1
Periodic mode
otherwise
Figure 8-2. DMA Controller General Flow
Chapter 8. DMA Controller
Chaining mode
*
of data
*
of data
otherwise
EOCA
1
Done
*
The first and/or last transfer will
be less than a line size transfer if
the initial address is not line
aligned and/or the byte count is
not an exact multiple of lines.
Done
DMA Operation
Direct mode
8-7

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