Target-Initiated Termination - Motorola MPC8240 User Manual

PCI Bus Transactions
As an initiator, if the MPC8240 does not detect the assertion of DEVSEL within four clock
cycles following the address phase (five clock cycles after asserting FRAME), it terminates
the transaction with a master-abort. On reads that are master-aborted, the MPC8240 returns
all 1s (0xFFFF). On writes that are master-aborted, the data is lost.

7.4.3.2 Target-Initiated Termination

By asserting the STOP signal, a target may request that the initiator terminate the current
transaction. Once asserted, the target holds STOP asserted until the initiator negates
FRAME. Data may or may not be transferred during the request for termination. If TRDY
and IRDY are asserted during the assertion of STOP, data is transferred. However, if TRDY
is negated when STOP is asserted, it indicates that the target will not transfer any more data;
therefore, the initiator does not wait for a final data transfer as it would in a completion
termination.
When a transaction is terminated by STOP, the initiator must negate its REQn signal for a
minimum of two PCI clock cycles, (one corresponding to when the bus goes to the idle state
(FRAME and IRDY negated)). If the initiator intends to complete the transaction, it can
reassert its REQn immediately following the two clock cycles. If the initiator does not
intend to complete the transaction, it can assert REQn whenever it needs to use the PCI bus
again.
There are three types of target-initiated termination:
• Disconnect—Disconnect refers to termination requested because the target is
temporarily unable to continue bursting. Disconnect implies that some data has been
transferred. The initiator may restart the transaction at a later time starting with the
address of the next untransferred data. (That is, data transfer may resume where it
left off.)
• Retry—Retry refers to termination requested because the target is currently in a state
where it is unable to process the transaction. Retry implies that no data was
transferred. The initiator may start the entire transaction over again at a later time.
Note that the PCI Local Bus Specification, rev 2.1 requires that all retried
transactions must be completed.
• Target-abort—Target-abort is an abnormal case of target-initiated termination.
Target-abort is used when a fatal error has occurred, or when a target will never be
able to respond. Target-abort is indicated by asserting STOP and negating DEVSEL.
This indicates that the target requires termination of the transaction and does not
want the transaction retried. If a transaction is terminated by target-abort, the
received target-abort bit (bit 12) of the initiator's status register and the signaled
target-abort bit (bit 11) of the target's status register are set. Note that any data
transferred in a target-aborted transaction may be corrupt.
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