Message Unit (Mu) Overview - Motorola MPC8240 User Manual

Chapter 9
Message Unit (with I
The MPC8240 provides a message unit (MU) to facilitate communication between the host
processor and peripheral processors. The MPC8240's MU can operate with generic
messages and doorbell registers; it also implements an I
chapter describes both interfaces implemented by the MU and provides the details on the
registers used by the MU.

9.1 Message Unit (MU) Overview

An embedded processor is often part of a larger system containing many processors and
distributed memory. These processors tend to work on tasks independent of host processors
and other peripheral processors in the system. Because of the independent nature of the
tasks, it is necessary to provide a communication mechanism between the peripheral
processors and the rest of the system. The MU of the MPC8240 provides the following
features which can be used for this communication:
• A generic message and doorbell register interface
• An I O-compliant interface
2
The message unit uses the internal int and INTA signals to communicate messages to the
processor core and the PCI bus. Internal int interrupts generated by the DMA unit are first
routed to the MU. These collected interrupts are then pooled with the doorbell and I
interrupts and routed to the EPIC unit as MU interrupts prior to the generation of the
internal int to the processor. Note that the EPIC unit only passes internally-generated
interrupts to the processor core when pass-through mode is disabled (GCR[M] = 0). See
Section 11.4, "EPIC Pass-Through Mode," for more information. Conversely, the MU
pools the various sources of INTA (from the DMA unit and MU-generated interrupt
conditions) for INTA assertion on the PCI bus.
O)
2
Chapter 9. Message Unit (with I
O-compliant interface. This
2
O)
2
O
2
9-1