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Chapter 2
MPC750 Processor Programming Model
This chapter describes the MPC750 programming model, emphasizing those features
specific to the MPC750 processor and summarizing those that are common to PowerPC
processors. It consists of three major sections, which describe the following:
•
Registers implemented in the MPC750
•
Operand conventions
The MPC750 instruction set
For detailed information about architecture-defined features, see The Programming
Environments Manual.
2.1 The MPC750 Processor Register Set
This section describes the registers implemented in the MPC750. It includes an overview
of registers defined by the PowerPC architecture, highlighting differences in how these
registers are implemented in the MPC750, and a detailed description of MPC750-specific
registers. Full descriptions of the architecture-defined register set are provided in Chapter 2,
"PowerPC Register Set," in The Programming Environments Manual.
Registers are defined at all three levels of the PowerPC architecture-user instruction set
architecture (UISA), virtual environment architecture (YEA), and operating environment
architecture (OEA). The PowerPC architecture defines register-to-register operations for all
computational instructions. Source data for these instructions are accessed from the on-chip
registers or are provided as immediate values embedded in the opcode. The three-register
instruction format allows specification of a target register distinct from the two source
registers, thus preserving the original data for use by other instructions and reducing the
number of instructions required for certain operations. Data is transferred between memory
and registers with explicit load and store instructions only.
2.1.1 Register Set
The registers implemented on the MPC750 are shown in Figure 2-1. The number to the
right of the special-purpose registers (SPRs) indicates the number that is used in the syntax
of the instruction operands to access the register (for example, the number used to access
the integer exception register (XER) is SPR 1). These registers can be accessed using the
mtspr and mfspr instructions.
Chapter 2. MPC750 Processor Programming Model
2-1
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