Watchpoint Facility Signal Interface - Motorola MPC8240 User Manual

Integrated host processor with integrated pci
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Chapter 16
Programmable I/O and Watchpoint
The MPC8240 programmable I/O and watchpoint facility allows system designers to
monitor the state of the internal peripheral logic (interface between the processor core and
the peripheral logic block) bus and trigger an output signal as shown in Figure 16-1. The
user programs up to two sets of fully maskable 58-bit triggers called watchpoints on the
peripheral logic address and control buses. Once enabled, the watchpoint facility scans the
peripheral logic bus for a user-programmable sequence of matches to these
watchpoints.Note that the peripheral logic bus signals are analogous to the 60x bus signals
on the MPC603e and throughout this chapter, they are referenced as the corresponding
external signals in the MPC603e User's Manual.
Figure 16-1. Watchpoint Facility Signal Interface
Each watchpoint has a dedicated, user programmable, 4-bit match count register. The value
programmed into the count register determines the number of times the associated
watchpoint must match the state of the peripheral logic bus before the watchpoint facility
generates a final match. Upon a final match, the watchpoint facility can be programmed to
generate an external trigger pulse on the TRIG_OUT signal. The watchpoint facility can be
programmed to disable itself and stop scanning (one-shot scan mode) following a trigger
pulse, or to continue to scan for the next occurrence of the trigger match (continuous scan
mode) until explicitly disabled by the user. The following features are provided by the
watchpoint facility:
MPC8240
Processor
core
Peripheral
logic bus
Peripheral
logic block
Chapter 16. Programmable I/O and Watchpoint
TRIG_OUT
Watchpoint
facility
TRIG_IN
16-1

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