Motorola MPC8240 User Manual page 135

Integrated host processor with integrated pci
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Table 4-2. MPC8240 Configuration Registers Accessible
Address
Offset
0xC3
Processor internal bus error status
register
0xC4
Error enabling register 2
0xC5
Error detection register 2
0xC7
PCI bus error status register
0xC8
Processor/PCI error address register
0xE0
Address map B options register
0xF0
MCCR1
0xF4
MCCR2
0xF8
MCCR3
0xFC
MCCR4
others
Reserved
Note: Reset values marked mode-dependent are defined by whether the MPC8240 is operating in host or agent
mode.
from the Processor Core (Continued)
Register
1 byte
1 byte
1 byte
1 byte
4 byte
1 byte
4 bytes
4 bytes
4 bytes
4 bytes
Chapter 4. Configuration Registers
Configuration Register Access
Program
Size
Access
Size (Bytes)
1
Read/Bit Reset
1
Read/Write
1
Read/Bit Reset
1
Read/Bit Reset
1, 2, or 4
Read
1
Read/Write
1, 2, or 4
Read/Write
1, 2, or 4
Read/Write
1, 2, or 4
Read/Write
1, 2, or 4
Read/Write
Access
Reset Value
0x00
0x00
0x00
0x00
0x00
0xC0
0xFFn2_0000
0x0000_0000
0x0000_0000
0x0000_0000
4-7

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