Pci Compatibility Hole And Alias Space - Motorola MPC8240 User Manual

PCI Memory Space
0
640 KB
Processor
Compatibility Hole
768 KB
16 MB
4G
Figure 3-4. Address Map B Processor Options in Host Mode

3.2.2 PCI Compatibility Hole and Alias Space

Table 3-6 defines the optional PCI compatibility hole and PCI alias space and how they fit
into map B.
Table 3-6. Address Map B—PCI Memory Master View in
PCI Memory Transaction Address Range
Hex
0000_0000 0009_FFFF
000A_0000 000F_FFFF
0010_0000 3FFF_FFFF
8000_0000 FDFF_FFFF
Transactions in the
processor compatibility
hole are forwarded
to PCI memory space
Transactions
in the alias space
are translated to the
lowest 16 Mbytes of
PCI memory space
Host Mode Options
Decimal
0 640K- 1
640K 1M - 1
1M 1G - 1
2G 4G - 48M - 1
Chapter 3. Address Maps
Processor
View
Processor
Compatibility Hole
PCI memory space
Processor alias space
Local Memory
Address Range
0000_0000–0009_FFFF
000A_0000–000F_FFFF
0010_0000–3FFF_FFFF
No local memory cycle
Address Map B Options
0
640 KB
768 KB
TOM
2G
4 GB - 48 MB
4 GB - 32 MB
4G
Definition
Local memory space
1
Compatibility hole
Local memory space
11
PCI memory space
3-9